From owner-freebsd-mips@FreeBSD.ORG Sun Oct 2 04:19:54 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C6ECD106566C; Sun, 2 Oct 2011 04:19:54 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-yw0-f54.google.com (mail-yw0-f54.google.com [209.85.213.54]) by mx1.freebsd.org (Postfix) with ESMTP id 469108FC08; Sun, 2 Oct 2011 04:19:53 +0000 (UTC) Received: by ywp17 with SMTP id 17so3240798ywp.13 for ; Sat, 01 Oct 2011 21:19:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=ySZbyVufTIAlRSgPuUTzDP+AlGVXue8D53JUrhR7Rcw=; b=PHOXjzV10gF2FZsP+8bCPd+PSNd4ZYGtOkkwg6C4RKxnvy2nLOW2NWw5O7YBpN/jF+ sj0lYX/CbgfLLVHBpexaAhJV49AaoxJjwWLMjP6ty8FUbVEBmCUACE5amJwpzq2F/u9a +ftbn89C02cjFnto6qVAE0YW6c22Qflmyrp9E= MIME-Version: 1.0 Received: by 10.236.79.72 with SMTP id h48mr82875390yhe.4.1317529193519; Sat, 01 Oct 2011 21:19:53 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Sat, 1 Oct 2011 21:19:53 -0700 (PDT) In-Reply-To: References: <201110010556.p915uQH6003016@svn.freebsd.org> Date: Sun, 2 Oct 2011 12:19:53 +0800 X-Google-Sender-Auth: SfqcdJekDBcA8lkCfrB-7Loih9E Message-ID: From: Adrian Chadd To: "Jayachandran C." , Konstantin Belousov Content-Type: text/plain; charset=ISO-8859-1 Cc: Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 02 Oct 2011 04:19:54 -0000 So the ar71xx mips24k core doesn't support that particular "wait IE ignore" feature. I've gone digging through the linux source. arch/mips/kernel/genex.S defines a bunch of things which basically match the idea kib had. adrian From owner-freebsd-mips@FreeBSD.ORG Sun Oct 2 09:28:27 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 72EAA106564A; Sun, 2 Oct 2011 09:28:27 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-gy0-f182.google.com (mail-gy0-f182.google.com [209.85.160.182]) by mx1.freebsd.org (Postfix) with ESMTP id E3C288FC0A; Sun, 2 Oct 2011 09:28:26 +0000 (UTC) Received: by gyf2 with SMTP id 2so3337614gyf.13 for ; Sun, 02 Oct 2011 02:28:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=iS3ViA97sNvhLhy3MKWPC8OCuWXsjyPrmFx4ah2D4/s=; b=eBVA7CYms1HbObCD6dKxeHBKMp8i85hwC0gE2O5QjCN7fVVDSxW3B7+zCBymjvxx3m U+r3zelU6SLaiJ9r6sdIvJzMNQmfo7t/4TiCO15WdOItNWXCB+AHzHFfis6PpkH4ionJ Y7g0ADht6yWs2BvNJTyVzD0KQhFDdUaMJc9DU= MIME-Version: 1.0 Received: by 10.236.129.165 with SMTP id h25mr24166791yhi.38.1317547706008; Sun, 02 Oct 2011 02:28:26 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Sun, 2 Oct 2011 02:28:25 -0700 (PDT) In-Reply-To: References: <201110010556.p915uQH6003016@svn.freebsd.org> Date: Sun, 2 Oct 2011 17:28:25 +0800 X-Google-Sender-Auth: -rAfFmh7q0FpmkzvXOYbrlRvrHk Message-ID: From: Adrian Chadd To: "Jayachandran C." , Konstantin Belousov Content-Type: text/plain; charset=ISO-8859-1 Cc: Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 02 Oct 2011 09:28:27 -0000 Hi, It doesn't look like openbsd or netbsd have tried addressing this. I took a shot at trying to port over the relevant bits. Linux seems to store the "can reschedule" flag in a bit of memory, rather than calling a function to check each time. This means that I can't simply port r4k_wait() verbose; there's no guarantee EPC would be pointing to inside r4k_wait if it had to call sched_runnable(). Also, since we are calling 'wait' inside a critical section, any EPC unwinding would have to also unwind the critical section (and maybe reprogram the timer) before restarting things. But since that now makes the "rollback" section even larger and unwieldy. I really don't have the time or brain power at the moment to try and port this solution over from Linux. I would really appreciate it if someone would help out here. Thanks, Adrian From owner-freebsd-mips@FreeBSD.ORG Sun Oct 2 11:14:51 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 785E4106564A for ; Sun, 2 Oct 2011 11:14:51 +0000 (UTC) (envelope-from kostikbel@gmail.com) Received: from mail.zoral.com.ua (mx0.zoral.com.ua [91.193.166.200]) by mx1.freebsd.org (Postfix) with ESMTP id 13DC98FC15 for ; Sun, 2 Oct 2011 11:14:50 +0000 (UTC) Received: from alf.home (alf.kiev.zoral.com.ua [10.1.1.177]) by mail.zoral.com.ua (8.14.2/8.14.2) with ESMTP id p92B3VgS012694 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 2 Oct 2011 14:03:31 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: from alf.home (kostik@localhost [127.0.0.1]) by alf.home (8.14.5/8.14.5) with ESMTP id p92B3VHM069121; Sun, 2 Oct 2011 14:03:31 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: (from kostik@localhost) by alf.home (8.14.5/8.14.5/Submit) id p92B3VcA069120; Sun, 2 Oct 2011 14:03:31 +0300 (EEST) (envelope-from kostikbel@gmail.com) X-Authentication-Warning: alf.home: kostik set sender to kostikbel@gmail.com using -f Date: Sun, 2 Oct 2011 14:03:31 +0300 From: Kostik Belousov To: Adrian Chadd Message-ID: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> References: Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="nRb24sRrY2rSsMZw" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-Virus-Scanned: clamav-milter 0.95.2 at skuns.kiev.zoral.com.ua X-Virus-Status: Clean X-Spam-Status: No, score=-3.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00, DNS_FROM_OPENWHOIS autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on skuns.kiev.zoral.com.ua Cc: "Jayachandran C." , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 02 Oct 2011 11:14:51 -0000 --nRb24sRrY2rSsMZw Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, Oct 02, 2011 at 05:28:25PM +0800, Adrian Chadd wrote: > Hi, >=20 > It doesn't look like openbsd or netbsd have tried addressing this. >=20 > I took a shot at trying to port over the relevant bits. >=20 > Linux seems to store the "can reschedule" flag in a bit of memory, > rather than calling a function to check each time. > This means that I can't simply port r4k_wait() verbose; there's no > guarantee EPC would be pointing to inside r4k_wait if it had to call > sched_runnable(). >=20 > Also, since we are calling 'wait' inside a critical section, any EPC > unwinding would have to also unwind the critical section (and maybe > reprogram the timer) before restarting things. But since that now > makes the "rollback" section even larger and unwieldy. >=20 > I really don't have the time or brain power at the moment to try and > port this solution over from Linux. >=20 > I would really appreciate it if someone would help out here. I probably need to describe some details of the mentioned "kib' idea". Looking at the x86 sti; hlt sequence, I noted that, in fact, we do not strictly need the special CPU behaviour of delaying enabling the interrupts till next instruction after sti is executed. The race there is the interrupt happen right after sti but before hlt, causing CPU to enter halted state while potentially having runnable thread. On x86 it is closed by sti not enabling interrupts till hlt started execution (it is more subtle, but let ignore the detail for the discussion). Now, if sti would not offer the useful postponing behaviour, we can easily emulate it. In the hardware interrupt handlers return path, we can check for $pc being equal to the address of the hlt instruction. If it is, we can advance $pc over the hlt, avoiding the halt if potentially we have a runnable thread. Briefly looking over the MIPS64 specifications, I do not see why we cannot implement the spirit of the trick for the ei; wait instruction sequence. ray talked about possibility of $pc living in the shadow register bank, which I think is not important. Another (minor) issue seems to be that our code does not use ei, directly manipulating the bit. My belief is that the trick can be done if only we have exact interrupts. It seems, from "run mips run" text, that possible inexact interrupts are either for much older platforms then modern MIPS SoC, or are irrelant there, because inexactness is only related to mul/div unit. [I am not on mips@] --nRb24sRrY2rSsMZw Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.18 (FreeBSD) iEYEARECAAYFAk6IRQMACgkQC3+MBN1Mb4imzQCgkqBbxpax7ZS0rBrGjARYiPNn X7UAn02R0lgIt0Ph2/8SllAnQbbDqfLm =FOM5 -----END PGP SIGNATURE----- --nRb24sRrY2rSsMZw-- From owner-freebsd-mips@FreeBSD.ORG Mon Oct 3 16:49:26 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5E9AF106566B; Mon, 3 Oct 2011 16:49:26 +0000 (UTC) (envelope-from c.jayachandran@gmail.com) Received: from mail-ww0-f42.google.com (mail-ww0-f42.google.com [74.125.82.42]) by mx1.freebsd.org (Postfix) with ESMTP id 4434D8FC0A; Mon, 3 Oct 2011 16:49:25 +0000 (UTC) Received: by wwn22 with SMTP id 22so3662678wwn.1 for ; Mon, 03 Oct 2011 09:49:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=47juk5tFQXVPhz3nkMdUgJh2dDb/ar3nTUTFC5hr7Iw=; b=O8YSTrOd5nMwm5tW0BGiRdNqTT77eZdRGU0EbLIoxMPLPU9V7nArEgb+9efWm2AnE+ nZiQ2M0wttdqiaKcAXSlemitokVv9dOhC19IjlsWRIhN7DPTJEJ5sdXg4J744WQx8oAU /m+W3vxiWUQpXVmeTmjnb9zp02LtOqbT7tSRo= MIME-Version: 1.0 Received: by 10.216.220.131 with SMTP id o3mr190106wep.11.1317660564211; Mon, 03 Oct 2011 09:49:24 -0700 (PDT) Sender: c.jayachandran@gmail.com Received: by 10.216.29.78 with HTTP; Mon, 3 Oct 2011 09:49:24 -0700 (PDT) In-Reply-To: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> Date: Mon, 3 Oct 2011 22:19:24 +0530 X-Google-Sender-Auth: wy7LWE-xFqGvl8mZCDAg4ANtk28 Message-ID: From: "Jayachandran C." To: Adrian Chadd Content-Type: multipart/mixed; boundary=0016e65a076edd4d3304ae67c16c Cc: Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Oct 2011 16:49:26 -0000 --0016e65a076edd4d3304ae67c16c Content-Type: text/plain; charset=ISO-8859-1 Hi Adrain, On Sun, Oct 2, 2011 at 4:33 PM, Kostik Belousov wrote: > On Sun, Oct 02, 2011 at 05:28:25PM +0800, Adrian Chadd wrote: >> Hi, >> >> It doesn't look like openbsd or netbsd have tried addressing this. >> >> I took a shot at trying to port over the relevant bits. >> >> Linux seems to store the "can reschedule" flag in a bit of memory, >> rather than calling a function to check each time. >> This means that I can't simply port r4k_wait() verbose; there's no >> guarantee EPC would be pointing to inside r4k_wait if it had to call >> sched_runnable(). >> >> Also, since we are calling 'wait' inside a critical section, any EPC >> unwinding would have to also unwind the critical section (and maybe >> reprogram the timer) before restarting things. But since that now >> makes the "rollback" section even larger and unwieldy. >> >> I really don't have the time or brain power at the moment to try and >> port this solution over from Linux. >> >> I would really appreciate it if someone would help out here. > > I probably need to describe some details of the mentioned "kib' idea". > > Looking at the x86 sti; hlt sequence, I noted that, in fact, we do > not strictly need the special CPU behaviour of delaying enabling the > interrupts till next instruction after sti is executed. The race there > is the interrupt happen right after sti but before hlt, causing CPU > to enter halted state while potentially having runnable thread. On x86 > it is closed by sti not enabling interrupts till hlt started execution > (it is more subtle, but let ignore the detail for the discussion). > > Now, if sti would not offer the useful postponing behaviour, we can > easily emulate it. In the hardware interrupt handlers return path, we > can check for $pc being equal to the address of the hlt instruction. If > it is, we can advance $pc over the hlt, avoiding the halt if potentially > we have a runnable thread. > > Briefly looking over the MIPS64 specifications, I do not see why we cannot > implement the spirit of the trick for the ei; wait instruction sequence. > ray talked about possibility of $pc living in the shadow register bank, > which I think is not important. Another (minor) issue seems to be > that our code does not use ei, directly manipulating the bit. > > My belief is that the trick can be done if only we have exact > interrupts. It seems, from "run mips run" text, that possible inexact > interrupts are either for much older platforms then modern MIPS SoC, or > are irrelant there, because inexactness is only related to mul/div unit. > > [I am not on mips@] I have implemented a variant of this, can you try out the attached patch and see how it goes? It should apply on the version before your changes to machdep.c Also, if anybody on mips@ can review the code, it would be helpful... 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To: Adrian Chadd Content-Type: text/plain; charset=ISO-8859-1 Cc: Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Oct 2011 19:07:42 -0000 On Mon, Oct 3, 2011 at 10:19 PM, Jayachandran C. wrote: > Hi Adrain, > > On Sun, Oct 2, 2011 at 4:33 PM, Kostik Belousov wrote: >> On Sun, Oct 02, 2011 at 05:28:25PM +0800, Adrian Chadd wrote: >>> Hi, >>> >>> It doesn't look like openbsd or netbsd have tried addressing this. >>> >>> I took a shot at trying to port over the relevant bits. >>> >>> Linux seems to store the "can reschedule" flag in a bit of memory, >>> rather than calling a function to check each time. >>> This means that I can't simply port r4k_wait() verbose; there's no >>> guarantee EPC would be pointing to inside r4k_wait if it had to call >>> sched_runnable(). >>> >>> Also, since we are calling 'wait' inside a critical section, any EPC >>> unwinding would have to also unwind the critical section (and maybe >>> reprogram the timer) before restarting things. But since that now >>> makes the "rollback" section even larger and unwieldy. >>> >>> I really don't have the time or brain power at the moment to try and >>> port this solution over from Linux. >>> >>> I would really appreciate it if someone would help out here. >> >> I probably need to describe some details of the mentioned "kib' idea". >> >> Looking at the x86 sti; hlt sequence, I noted that, in fact, we do >> not strictly need the special CPU behaviour of delaying enabling the >> interrupts till next instruction after sti is executed. The race there >> is the interrupt happen right after sti but before hlt, causing CPU >> to enter halted state while potentially having runnable thread. On x86 >> it is closed by sti not enabling interrupts till hlt started execution >> (it is more subtle, but let ignore the detail for the discussion). >> >> Now, if sti would not offer the useful postponing behaviour, we can >> easily emulate it. In the hardware interrupt handlers return path, we >> can check for $pc being equal to the address of the hlt instruction. If >> it is, we can advance $pc over the hlt, avoiding the halt if potentially >> we have a runnable thread. >> >> Briefly looking over the MIPS64 specifications, I do not see why we cannot >> implement the spirit of the trick for the ei; wait instruction sequence. >> ray talked about possibility of $pc living in the shadow register bank, >> which I think is not important. Another (minor) issue seems to be >> that our code does not use ei, directly manipulating the bit. >> >> My belief is that the trick can be done if only we have exact >> interrupts. It seems, from "run mips run" text, that possible inexact >> interrupts are either for much older platforms then modern MIPS SoC, or >> are irrelant there, because inexactness is only related to mul/div unit. >> >> [I am not on mips@] > > I have implemented a variant of this, can you try out the attached > patch and see how it goes? It should apply on the version before your > changes to machdep.c > > Also, if anybody on mips@ can review the code, it would be helpful... Actually there are two issues with this, the first is a simple bug, it should be : mtc0 t1, MIPS_COP_0_STATUS The second one is that a move to the status register should followed by a COP0 write hazard on some mips platforms (although not on XLR/XLP). Adding this hazard would make the calculations more complex.... JC. From owner-freebsd-mips@FreeBSD.ORG Mon Oct 3 21:53:14 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6771A1065762; Mon, 3 Oct 2011 21:53:14 +0000 (UTC) (envelope-from c.jayachandran@gmail.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 303C28FC0C; Mon, 3 Oct 2011 21:53:13 +0000 (UTC) Received: by wyj26 with SMTP id 26so4944769wyj.13 for ; Mon, 03 Oct 2011 14:53:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=H3v04gqSILMtBMyemATnMsEYWOXpEHm6wTE33tve5l4=; b=Aat9hNPv603GnxAetMs8rAZHrkNnOY7I/UISQUS4gVgKHeI2yx5Qx0hy3LmQNvwzDR L3OvaIrfDZZIpdy0pDYnGuhFDbNG+Hg+bowRapF15S5zlAFQt7z2Q3XksuQq2LRrjsts lXypPCnM6dcB5PFuhlBthuOhpqpPWYIyLIR3c= MIME-Version: 1.0 Received: by 10.216.138.210 with SMTP id a60mr3158939wej.41.1317678792155; Mon, 03 Oct 2011 14:53:12 -0700 (PDT) Sender: c.jayachandran@gmail.com Received: by 10.216.29.78 with HTTP; Mon, 3 Oct 2011 14:53:11 -0700 (PDT) In-Reply-To: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> Date: Tue, 4 Oct 2011 03:23:11 +0530 X-Google-Sender-Auth: OGfBxXRw2BMqjiw35eCiqqB76Gw Message-ID: From: "Jayachandran C." To: Adrian Chadd Content-Type: multipart/mixed; boundary=0016e6d5895955a1c904ae6c0098 Cc: Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Oct 2011 21:53:14 -0000 --0016e6d5895955a1c904ae6c0098 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On Tue, Oct 4, 2011 at 12:34 AM, Jayachandran C. wro= te: > On Mon, Oct 3, 2011 at 10:19 PM, Jayachandran C. w= rote: >> Hi Adrain, >> >> On Sun, Oct 2, 2011 at 4:33 PM, Kostik Belousov wr= ote: >>> On Sun, Oct 02, 2011 at 05:28:25PM +0800, Adrian Chadd wrote: >>>> Hi, >>>> >>>> It doesn't look like openbsd or netbsd have tried addressing this. >>>> >>>> I took a shot at trying to port over the relevant bits. >>>> >>>> Linux seems to store the "can reschedule" flag in a bit of memory, >>>> rather than calling a function to check each time. >>>> This means that I can't simply port r4k_wait() verbose; there's no >>>> guarantee EPC would be pointing to inside r4k_wait if it had to call >>>> sched_runnable(). >>>> >>>> Also, since we are calling 'wait' inside a critical section, any EPC >>>> unwinding would have to also unwind the critical section (and maybe >>>> reprogram the timer) before restarting things. But since that now >>>> makes the "rollback" section even larger and unwieldy. >>>> >>>> I really don't have the time or brain power at the moment to try and >>>> port this solution over from Linux. >>>> >>>> I would really appreciate it if someone would help out here. >>> >>> I probably need to describe some details of the mentioned "kib' idea". >>> >>> Looking at the x86 sti; hlt sequence, I noted that, in fact, we do >>> not strictly need the special CPU behaviour of delaying enabling the >>> interrupts till next instruction after sti is executed. The race there >>> is the interrupt happen right after sti but before hlt, causing CPU >>> to enter halted state while potentially having runnable thread. On x86 >>> it is closed by sti not enabling interrupts till hlt started execution >>> (it is more subtle, but let ignore the detail for the discussion). >>> >>> Now, if sti would not offer the useful postponing behaviour, we can >>> easily emulate it. In the hardware interrupt handlers return path, we >>> can check for $pc being equal to the address of the hlt instruction. If >>> it is, we can advance $pc over the hlt, avoiding the halt if potentiall= y >>> we have a runnable thread. >>> >>> Briefly looking over the MIPS64 specifications, I do not see why we can= not >>> implement the spirit of the trick for the ei; wait instruction sequence= . >>> ray talked about possibility of $pc living in the shadow register bank, >>> which I think is not important. Another (minor) issue seems to be >>> that our code does not use ei, directly manipulating the bit. >>> >>> My belief is that the trick can be done if only we have exact >>> interrupts. It seems, from "run mips run" text, that possible inexact >>> interrupts are either for much older platforms then modern MIPS SoC, or >>> are irrelant there, because inexactness is only related to mul/div unit= . >>> >>> [I am not on mips@] >> >> I have implemented a variant of this, can you try out the attached >> patch and see how it goes? It should apply on the version before your >> changes to machdep.c >> >> Also, if anybody on mips@ can review the code, it would be helpful... > > Actually there are two issues with this, the first is a simple bug, it > should be : > mtc0 =A0 =A0t1, MIPS_COP_0_STATUS > > The second one is that a move to the status register should followed > by a COP0 write hazard on some mips platforms (although not on > XLR/XLP). Adding this hazard would make the calculations more > complex.... This version should be better(thanks to Juli for suggestions). Can you see if this helps? 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Mon, 3 Oct 2011 23:11:16 +0000 (UTC) (envelope-from aduane@juniper.net) Received: from exprod7og104.obsmtp.com (exprod7og104.obsmtp.com [64.18.2.161]) by mx1.freebsd.org (Postfix) with ESMTP id 2FA738FC13; Mon, 3 Oct 2011 23:11:14 +0000 (UTC) Received: from P-EMHUB03-HQ.jnpr.net ([66.129.224.36]) (using TLSv1) by exprod7ob104.postini.com ([64.18.6.12]) with SMTP; Mon, 03 Oct 2011 16:11:15 PDT Received: from p-emfe01-wf.jnpr.net (172.28.145.24) by P-EMHUB03-HQ.jnpr.net (172.24.192.37) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 3 Oct 2011 16:09:45 -0700 Received: from EMBX01-WF.jnpr.net ([fe80::1914:3299:33d9:e43b]) by p-emfe01-wf.jnpr.net ([fe80::d0d1:653d:5b91:a123%11]) with mapi; Mon, 3 Oct 2011 19:09:44 -0400 From: Andrew Duane To: Jayachandran C. , Adrian Chadd Date: Mon, 3 Oct 2011 19:09:43 -0400 Thread-Topic: svn commit: r225892 - head/sys/mips/mips Thread-Index: AcyCFu3g86Fvn2RUTp+9INCwkE5EAQACjO0Q Message-ID: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: Kostik Belousov , Alexander Motin , "freebsd-mips@freebsd.org" Subject: RE: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Oct 2011 23:11:16 -0000 The COP0_SYNC's should be there (should there also be one after the MTC0 in= MipsKernIntr?). The ISA says a hazard is needed, so that should be reflect= ed. I assume different platforms define COP0_SYNC for themselves as needed? Other comment: rather than adding 16 to the StartSkipWait address if skippi= ng over it, should the address of EndSkipWait be loaded instead? I can see = some real problems someday when the skip stuff goes past 16 bytes. =A0................................... Andrew Duane Juniper Networks o=A0=A0=A0+1 978 589 0551 m=A0 +1 603-770-7088 aduane@juniper.net =A0 > -----Original Message----- > From: owner-freebsd-mips@freebsd.org [mailto:owner-freebsd- > mips@freebsd.org] On Behalf Of Jayachandran C. > Sent: Monday, October 03, 2011 2:53 PM > To: Adrian Chadd > Cc: Kostik Belousov; Alexander Motin; freebsd-mips@freebsd.org > Subject: Re: svn commit: r225892 - head/sys/mips/mips >=20 > On Tue, Oct 4, 2011 at 12:34 AM, Jayachandran C. > wrote: > > On Mon, Oct 3, 2011 at 10:19 PM, Jayachandran C. > wrote: > >> Hi Adrain, > >> > >> On Sun, Oct 2, 2011 at 4:33 PM, Kostik Belousov > wrote: > >>> On Sun, Oct 02, 2011 at 05:28:25PM +0800, Adrian Chadd wrote: > >>>> Hi, > >>>> > >>>> It doesn't look like openbsd or netbsd have tried addressing this. > >>>> > >>>> I took a shot at trying to port over the relevant bits. > >>>> > >>>> Linux seems to store the "can reschedule" flag in a bit of memory, > >>>> rather than calling a function to check each time. > >>>> This means that I can't simply port r4k_wait() verbose; there's no > >>>> guarantee EPC would be pointing to inside r4k_wait if it had to > >>>> call sched_runnable(). > >>>> > >>>> Also, since we are calling 'wait' inside a critical section, any > >>>> EPC unwinding would have to also unwind the critical section (and > >>>> maybe reprogram the timer) before restarting things. But since > that > >>>> now makes the "rollback" section even larger and unwieldy. > >>>> > >>>> I really don't have the time or brain power at the moment to try > >>>> and port this solution over from Linux. > >>>> > >>>> I would really appreciate it if someone would help out here. > >>> > >>> I probably need to describe some details of the mentioned "kib' > idea". > >>> > >>> Looking at the x86 sti; hlt sequence, I noted that, in fact, we do > >>> not strictly need the special CPU behaviour of delaying enabling > the > >>> interrupts till next instruction after sti is executed. The race > >>> there is the interrupt happen right after sti but before hlt, > >>> causing CPU to enter halted state while potentially having runnable > >>> thread. On x86 it is closed by sti not enabling interrupts till hlt > >>> started execution (it is more subtle, but let ignore the detail for > the discussion). > >>> > >>> Now, if sti would not offer the useful postponing behaviour, we can > >>> easily emulate it. In the hardware interrupt handlers return path, > >>> we can check for $pc being equal to the address of the hlt > >>> instruction. If it is, we can advance $pc over the hlt, avoiding > the > >>> halt if potentially we have a runnable thread. > >>> > >>> Briefly looking over the MIPS64 specifications, I do not see why we > >>> cannot implement the spirit of the trick for the ei; wait > instruction sequence. > >>> ray talked about possibility of $pc living in the shadow register > >>> bank, which I think is not important. Another (minor) issue seems > to > >>> be that our code does not use ei, directly manipulating the bit. > >>> > >>> My belief is that the trick can be done if only we have exact > >>> interrupts. It seems, from "run mips run" text, that possible > >>> inexact interrupts are either for much older platforms then modern > >>> MIPS SoC, or are irrelant there, because inexactness is only > related to mul/div unit. > >>> > >>> [I am not on mips@] > >> > >> I have implemented a variant of this, can you try out the attached > >> patch and see how it goes? It should apply on the version before > your > >> changes to machdep.c > >> > >> Also, if anybody on mips@ can review the code, it would be > helpful... > > > > Actually there are two issues with this, the first is a simple bug, > it > > should be : > > mtc0 =A0 =A0t1, MIPS_COP_0_STATUS > > > > The second one is that a move to the status register should followed > > by a COP0 write hazard on some mips platforms (although not on > > XLR/XLP). Adding this hazard would make the calculations more > > complex.... >=20 > This version should be better(thanks to Juli for suggestions). Can you > see if this helps? >=20 > Thanks, > JC From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 00:44:36 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E2440106566B; Tue, 4 Oct 2011 00:44:36 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-gx0-f182.google.com (mail-gx0-f182.google.com [209.85.161.182]) by mx1.freebsd.org (Postfix) with ESMTP id 215678FC08; Tue, 4 Oct 2011 00:44:36 +0000 (UTC) Received: by ggeq3 with SMTP id q3so711421gge.13 for ; Mon, 03 Oct 2011 17:44:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=F7jvgLmWqSUXixutae2iI+InKutGE1epApn2ru8SiVw=; b=HCZuNkEWChpOH2Uw5J3b7EdkAeYw/62P63ugQS7tU8j2w0Uu6mDJpu8+pqvNasg1h1 EVwP7rvEZcR0Nx4Dmqkk37HLeaU2R3AVRV0o/StNF/fjSpdmxlEFdrMvmXRfRCpRYXi7 WwFYJEn8v9xk4y4FubVp16HCLKsBtBPBx822k= MIME-Version: 1.0 Received: by 10.236.79.72 with SMTP id h48mr3484149yhe.4.1317689075704; Mon, 03 Oct 2011 17:44:35 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Mon, 3 Oct 2011 17:44:35 -0700 (PDT) In-Reply-To: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> Date: Tue, 4 Oct 2011 08:44:35 +0800 X-Google-Sender-Auth: XXUTs0U_KX4LuiD6EfMhvYnKE6g Message-ID: From: Adrian Chadd To: "Jayachandran C." Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 00:44:37 -0000 On 4 October 2011 05:53, Jayachandran C. wrote: > This version should be better(thanks to Juli for suggestions). =A0Can > you see if this helps? Hi! What's the jal to sched_runnable achieve? It doesn't look like you're using the return value to skip the wait block. Adrian From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 01:21:30 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 77E0B106566B; Tue, 4 Oct 2011 01:21:30 +0000 (UTC) (envelope-from juli@clockworksquid.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 719E48FC0A; Tue, 4 Oct 2011 01:21:28 +0000 (UTC) Received: by wyj26 with SMTP id 26so5107401wyj.13 for ; Mon, 03 Oct 2011 18:21:28 -0700 (PDT) Received: by 10.227.20.77 with SMTP id e13mr633227wbb.97.1317691288172; Mon, 03 Oct 2011 18:21:28 -0700 (PDT) MIME-Version: 1.0 Sender: juli@clockworksquid.com Received: by 10.227.199.140 with HTTP; Mon, 3 Oct 2011 18:21:08 -0700 (PDT) In-Reply-To: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> From: Juli Mallett Date: Mon, 3 Oct 2011 18:21:08 -0700 X-Google-Sender-Auth: ibQ9NAg6qlGICRQT3_3BoahNa3I Message-ID: To: Adrian Chadd Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: "Jayachandran C." , Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 01:21:30 -0000 On Mon, Oct 3, 2011 at 17:44, Adrian Chadd wrote: > On 4 October 2011 05:53, Jayachandran C. wrote: > >> This version should be better(thanks to Juli for suggestions). =C2=A0Can >> you see if this helps? > > Hi! > > What's the jal to sched_runnable achieve? It doesn't look like you're > using the return value to skip the wait block. Look at v0's use within the wait block. From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 01:38:03 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A916F106566C; Tue, 4 Oct 2011 01:38:03 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-yx0-f182.google.com (mail-yx0-f182.google.com [209.85.213.182]) by mx1.freebsd.org (Postfix) with ESMTP id 0E6068FC0C; Tue, 4 Oct 2011 01:38:02 +0000 (UTC) Received: by yxk36 with SMTP id 36so5194252yxk.13 for ; Mon, 03 Oct 2011 18:38:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=sg5Ri0DEXDf8vUcG27V84QLm3NydA/9DCK1hBDSdO9g=; b=PaAKE5HbGTHubkb7Idm16cmmJ/5+v/zQhb+MUY7H0g/MuAUkYe6y2HaJeft3jMAQng tJIvMXV7J6Q1CLojV+hzcruDouIZY/Q4Nh3q4GlAUPkd43EkP1jRnsEyUrqFHpGlteXN oP1bZbJqcSPhw8K5+P4ZLdkWY/n4dFIygCpsI= MIME-Version: 1.0 Received: by 10.236.79.72 with SMTP id h48mr3639297yhe.4.1317692282548; Mon, 03 Oct 2011 18:38:02 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Mon, 3 Oct 2011 18:38:02 -0700 (PDT) In-Reply-To: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> Date: Tue, 4 Oct 2011 09:38:02 +0800 X-Google-Sender-Auth: z2JqFPENOSmobZzlMTmzkuQjYBA Message-ID: From: Adrian Chadd To: Juli Mallett Content-Type: text/plain; charset=ISO-8859-1 Cc: "Jayachandran C." , Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 01:38:03 -0000 On 4 October 2011 09:21, Juli Mallett wrote: >> What's the jal to sched_runnable achieve? It doesn't look like you're >> using the return value to skip the wait block. > > Look at v0's use within the wait block. Sorry, total MIPS assembly fail on my part. Adrian From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 01:38:59 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BCEF81065670; Tue, 4 Oct 2011 01:38:59 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-yw0-f54.google.com (mail-yw0-f54.google.com [209.85.213.54]) by mx1.freebsd.org (Postfix) with ESMTP id 483E18FC0A; Tue, 4 Oct 2011 01:38:59 +0000 (UTC) Received: by ywp17 with SMTP id 17so5089732ywp.13 for ; Mon, 03 Oct 2011 18:38:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=bRA2FtOtOZUd4gHE9hoClp56bCeBs7Y+9AL8RmXnf7g=; b=FFarFKpZSIyVKMKLCCfE4uhwQBy3yUYAecqWcU8SEL9M6cWNYcKghkwIpxPl5xbh3f B1zDczTZ2PqBhb9RBk67r8oh5/jjN5J8hkLnD4uqMLoLKgTiSjmO1S75WMXNsiXBGaPo 3EpGrt+atVCkjyMud6HoNg/SvHnuOx6TWjLM0= MIME-Version: 1.0 Received: by 10.236.157.161 with SMTP id o21mr3379012yhk.72.1317692338667; Mon, 03 Oct 2011 18:38:58 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Mon, 3 Oct 2011 18:38:58 -0700 (PDT) In-Reply-To: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> Date: Tue, 4 Oct 2011 09:38:58 +0800 X-Google-Sender-Auth: E2wIw1o6WJhayKj9USPzJJme36o Message-ID: From: Adrian Chadd To: Andrew Duane Content-Type: text/plain; charset=ISO-8859-1 Cc: "Jayachandran C." , Kostik Belousov , Alexander Motin , "freebsd-mips@freebsd.org" Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 01:38:59 -0000 On 4 October 2011 07:09, Andrew Duane wrote: > The COP0_SYNC's should be there (should there also be one after the MTC0 in MipsKernIntr?). The ISA says a hazard is needed, so that should be reflected. I assume different platforms define COP0_SYNC for themselves as needed? Is one needed after the mtc0 after StartWaitSkip? Adrian From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 02:42:19 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E14731065672; Tue, 4 Oct 2011 02:42:19 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (bsdimp.com [199.45.160.85]) by mx1.freebsd.org (Postfix) with ESMTP id 718778FC15; Tue, 4 Oct 2011 02:42:19 +0000 (UTC) Received: from [10.0.0.63] (63.imp.bsdimp.com [10.0.0.63]) (authenticated bits=0) by harmony.bsdimp.com (8.14.4/8.14.3) with ESMTP id p942ddsi066642 (version=TLSv1/SSLv3 cipher=DHE-DSS-AES128-SHA bits=128 verify=NO); Mon, 3 Oct 2011 20:39:39 -0600 (MDT) (envelope-from imp@bsdimp.com) Mime-Version: 1.0 (Apple Message framework v1084) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: Date: Mon, 3 Oct 2011 20:39:42 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <79147576-6E4F-46C9-8887-0847567A46A7@bsdimp.com> References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> To: Adrian Chadd X-Mailer: Apple Mail (2.1084) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.0.1 (harmony.bsdimp.com [10.0.0.6]); Mon, 03 Oct 2011 20:39:41 -0600 (MDT) Cc: "Jayachandran C." , Kostik Belousov , Alexander Motin , "freebsd-mips@freebsd.org" Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 02:42:20 -0000 On Oct 3, 2011, at 7:38 PM, Adrian Chadd wrote: > On 4 October 2011 07:09, Andrew Duane wrote: >> The COP0_SYNC's should be there (should there also be one after the = MTC0 in MipsKernIntr?). The ISA says a hazard is needed, so that should = be reflected. I assume different platforms define COP0_SYNC for = themselves as needed? >=20 > Is one needed after the mtc0 after StartWaitSkip? I don't think it matters. The COP0_SYNC is needed when you want to = flush the instruction pipeline so that changes to COP0 don't affect them = 'randomly'. However, in this case. Either we're setting a bit that's = already set, which won't change anything, or we're setting a bit that's = clear, which will just delay the delivery of the interrupt a few cycles. = The race where it happens before the wait instruction is handled by the = rest of the patch. Warner From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 02:45:06 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BA452106566B; Tue, 4 Oct 2011 02:45:06 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-gy0-f182.google.com (mail-gy0-f182.google.com [209.85.160.182]) by mx1.freebsd.org (Postfix) with ESMTP id 3CE058FC0C; Tue, 4 Oct 2011 02:45:05 +0000 (UTC) Received: by gyf2 with SMTP id 2so47474gyf.13 for ; Mon, 03 Oct 2011 19:45:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=m6+nehxglakeTA1qylRV1tfYF+ObCCuWZUylmkUWqWM=; b=PiEoRlx/zMo0SF0C9DSL5LFEjzmopPvwQSUedW9S63r2PGiDCEYFp8kDyxXTQf1Iz3 TgdRHxK1SRGUOkOuMnJ6TVoD7+ynzmHKG2ouwkBeKqTkmiH57x2iwc9kt8NsM34X2nqK GGZ9OvV4Sz3vkEgkhaQEaI3j80P/BPlUHvLpM= MIME-Version: 1.0 Received: by 10.236.185.131 with SMTP id u3mr3597020yhm.55.1317696305491; Mon, 03 Oct 2011 19:45:05 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Mon, 3 Oct 2011 19:45:05 -0700 (PDT) In-Reply-To: <79147576-6E4F-46C9-8887-0847567A46A7@bsdimp.com> References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> <79147576-6E4F-46C9-8887-0847567A46A7@bsdimp.com> Date: Tue, 4 Oct 2011 10:45:05 +0800 X-Google-Sender-Auth: EtdkwXini2lxnXKZXK_kKkWKVik Message-ID: From: Adrian Chadd To: Warner Losh Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: "Jayachandran C." , Kostik Belousov , Alexander Motin , "freebsd-mips@freebsd.org" Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 02:45:06 -0000 On 4 October 2011 10:39, Warner Losh wrote: >> Is one needed after the mtc0 after StartWaitSkip? > > I don't think it matters. =A0The COP0_SYNC is needed when you want to flu= sh the instruction pipeline so that changes to COP0 don't affect them 'rand= omly'. =A0However, in this case. =A0Either we're setting a bit that's alrea= dy set, which won't change anything, or we're setting a bit that's clear, w= hich will just delay the delivery of the interrupt a few cycles. =A0The rac= e where it happens before the wait instruction is handled by the rest of th= e patch. That makes sense. I'll try this patch out soon and let you all know how it = goes. Now, hm. How can I easily instrument whether the hardware is actually spending time in wait or not? Thanks, Adrian From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 15:24:11 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 78729106566B; Tue, 4 Oct 2011 15:24:11 +0000 (UTC) (envelope-from aduane@juniper.net) Received: from exprod7og120.obsmtp.com (exprod7og120.obsmtp.com [64.18.2.18]) by mx1.freebsd.org (Postfix) with ESMTP id 86F798FC26; Tue, 4 Oct 2011 15:24:07 +0000 (UTC) Received: from P-EMHUB01-HQ.jnpr.net ([66.129.224.36]) (using TLSv1) by exprod7ob120.postini.com ([64.18.6.12]) with SMTP; Tue, 04 Oct 2011 08:24:11 PDT Received: from p-emfe01-wf.jnpr.net (172.28.145.24) by P-EMHUB01-HQ.jnpr.net (172.24.192.35) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 4 Oct 2011 08:22:15 -0700 Received: from EMBX01-WF.jnpr.net ([fe80::1914:3299:33d9:e43b]) by p-emfe01-wf.jnpr.net ([fe80::d0d1:653d:5b91:a123%11]) with mapi; Tue, 4 Oct 2011 11:22:14 -0400 From: Andrew Duane To: Warner Losh , Adrian Chadd Date: Tue, 4 Oct 2011 11:22:13 -0400 Thread-Topic: svn commit: r225892 - head/sys/mips/mips Thread-Index: AcyCP0JNZHSCsecwTdWmNMj1qfWH+gAaiKLY Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "Jayachandran C." , Kostik Belousov , Alexander Motin , "freebsd-mips@freebsd.org" Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 15:24:11 -0000 Let me pull my MIPS manual when I get in. It exactly specifies the hazards = for each bit. Warner Losh wrote: On Oct 3, 2011, at 7:38 PM, Adrian Chadd wrote: > On 4 October 2011 07:09, Andrew Duane wrote: >> The COP0_SYNC's should be there (should there also be one after the MTC0= in MipsKernIntr?). The ISA says a hazard is needed, so that should be refl= ected. I assume different platforms define COP0_SYNC for themselves as need= ed? > > Is one needed after the mtc0 after StartWaitSkip? I don't think it matters. The COP0_SYNC is needed when you want to flush t= he instruction pipeline so that changes to COP0 don't affect them 'randomly= '. However, in this case. Either we're setting a bit that's already set, = which won't change anything, or we're setting a bit that's clear, which wil= l just delay the delivery of the interrupt a few cycles. The race where it= happens before the wait instruction is handled by the rest of the patch. Warner From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 15:48:46 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9A7AD106566B; Tue, 4 Oct 2011 15:48:46 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-gy0-f182.google.com (mail-gy0-f182.google.com [209.85.160.182]) by mx1.freebsd.org (Postfix) with ESMTP id F1BB28FC15; Tue, 4 Oct 2011 15:48:45 +0000 (UTC) Received: by gyf2 with SMTP id 2so790083gyf.13 for ; Tue, 04 Oct 2011 08:48:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=s0/6wASvS8gm2g9BXQNPb07JSLUTw9ibzwHWbZyRJYc=; b=TT0BnNSaE9/Nh0P3s46wEbGABiOQwiPDEV6X7xEyFpY7W6QXFN9f6crrzKGY5EQlbx Qlu764E2iwQsrQ7Ly8NU+kdRT23uT5RxH0gOLFYOy2uvs99or+mFT+faIoYgW+DEjHb1 WC/SBZBIADC79xdKX/d2mIgq+trwHUQppdnyw= MIME-Version: 1.0 Received: by 10.236.129.242 with SMTP id h78mr7445550yhi.89.1317743325488; Tue, 04 Oct 2011 08:48:45 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Tue, 4 Oct 2011 08:48:45 -0700 (PDT) In-Reply-To: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> Date: Tue, 4 Oct 2011 23:48:45 +0800 X-Google-Sender-Auth: AT4_vWKYz_ehevtqI783F1JvBJo Message-ID: From: Adrian Chadd To: "Jayachandran C." Content-Type: text/plain; charset=ISO-8859-1 Cc: Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 15:48:46 -0000 Hi all, I've tried jc's patch. The hand-wavy, brief summary when tested on my hostap (mips): * when doing single-stream, one way TCP tests (where it thus needs TX/RX traffic to occur), I get 100% CPU utilisation - 50% interrupt, 50% system, but the total interrupt rate isn't too high. It's much higher than without his patch. I'll go digging later to see what's going on. * when doing single-stream, one way UDP (ie, only RX traffic, no TX besides beacons and occasional other stuff), the system utilisation is better (70% system, ~ 2% interrupt). But I still see interrupt latency issues. I don't know whether it's because interrupts are missed or they're not missed but the scheduling doesn't occur until after wait has returned. I'll have to do some further digging. adrian From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 16:06:27 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1BEDD1065670; Tue, 4 Oct 2011 16:06:27 +0000 (UTC) (envelope-from aduane@juniper.net) Received: from exprod7og112.obsmtp.com (exprod7og112.obsmtp.com [64.18.2.177]) by mx1.freebsd.org (Postfix) with ESMTP id 53E0C8FC0C; Tue, 4 Oct 2011 16:06:25 +0000 (UTC) Received: from P-EMHUB01-HQ.jnpr.net ([66.129.224.36]) (using TLSv1) by exprod7ob112.postini.com ([64.18.6.12]) with SMTP; Tue, 04 Oct 2011 09:06:26 PDT Received: from P-EMHUB11-HQ.jnpr.net (172.24.192.58) by P-EMHUB01-HQ.jnpr.net (172.24.192.35) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 4 Oct 2011 09:04:51 -0700 Received: from p-emfe01-wf.jnpr.net (172.28.145.24) by P-EMHUB11-HQ.jnpr.net (172.24.192.58) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 4 Oct 2011 09:04:51 -0700 Received: from EMBX01-WF.jnpr.net ([fe80::1914:3299:33d9:e43b]) by p-emfe01-wf.jnpr.net ([fe80::d0d1:653d:5b91:a123%11]) with mapi; Tue, 4 Oct 2011 12:04:50 -0400 From: Andrew Duane To: Andrew Duane , Warner Losh , Adrian Chadd Date: Tue, 4 Oct 2011 12:04:48 -0400 Thread-Topic: svn commit: r225892 - head/sys/mips/mips Thread-Index: AcyCP0JNZHSCsecwTdWmNMj1qfWH+gAaiKLYAAFZGkA= Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "Jayachandran C." , Kostik Belousov , Alexander Motin , "freebsd-mips@freebsd.org" Subject: RE: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 16:06:27 -0000 The MIPS manual volume 3 says there is a 3 cycle "typical" wait between an = MTC0 that messes with Status[IE] and an interrupted instruction. That hazar= d doesn't seem to apply here, to any of the cases we have. I do have a question: in StartWaitSkip, the value of Status[IE] is being to= ggled, not cleared. Is that correct? Do we always guarantee that it will be= set on entry here? I had also made a comment about the "PTR_ADDU k1, 16 # skip over wait" in M= ipsKernIntr; I think it would be safer (and clearer) to do "PTR_LA k1, EndW= aitSkip" instead. =A0................................... Andrew Duane Juniper Networks o=A0=A0=A0+1 978 589 0551 m=A0 +1 603-770-7088 aduane@juniper.net =A0 > -----Original Message----- > From: Andrew Duane > Sent: Tuesday, October 04, 2011 8:22 AM > To: Warner Losh; Adrian Chadd > Cc: Andrew Duane; Jayachandran C.; Kostik Belousov; Alexander Motin; > freebsd-mips@freebsd.org > Subject: Re: svn commit: r225892 - head/sys/mips/mips >=20 > Let me pull my MIPS manual when I get in. It exactly specifies the > hazards for each bit. >=20 > Warner Losh wrote: >=20 >=20 > On Oct 3, 2011, at 7:38 PM, Adrian Chadd wrote: >=20 > > On 4 October 2011 07:09, Andrew Duane wrote: > >> The COP0_SYNC's should be there (should there also be one after the > MTC0 in MipsKernIntr?). The ISA says a hazard is needed, so that should > be reflected. I assume different platforms define COP0_SYNC for > themselves as needed? > > > > Is one needed after the mtc0 after StartWaitSkip? >=20 > I don't think it matters. The COP0_SYNC is needed when you want to > flush the instruction pipeline so that changes to COP0 don't affect > them 'randomly'. However, in this case. Either we're setting a bit > that's already set, which won't change anything, or we're setting a bit > that's clear, which will just delay the delivery of the interrupt a few > cycles. The race where it happens before the wait instruction is > handled by the rest of the patch. >=20 > Warner From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 16:18:01 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9E94A1065679; Tue, 4 Oct 2011 16:18:01 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-yw0-f54.google.com (mail-yw0-f54.google.com [209.85.213.54]) by mx1.freebsd.org (Postfix) with ESMTP id D586E8FC17; Tue, 4 Oct 2011 16:18:00 +0000 (UTC) Received: by ywp17 with SMTP id 17so833561ywp.13 for ; Tue, 04 Oct 2011 09:18:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=HMESRNF2KZmKsH8OuD1LVJWhbKi0DinR5Q5GDkBfGWM=; b=NR63IV1ciZEUsohu+QM1NxVCX6Ty+mmbmhczcl7Ky94QJodEnF9AUhyEA5YZTqHMAz qRLw0B5VxLNe/38sYtTotdaRzWLVkwIU5IcdgUIf38NsTK5G5ZSc/70HwEbl4EaFTHJt ADlRaaqd0YwjPTaXUaH5r4CBrlJ21FermM28U= MIME-Version: 1.0 Received: by 10.236.79.72 with SMTP id h48mr8121005yhe.4.1317745080380; Tue, 04 Oct 2011 09:18:00 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.236.111.42 with HTTP; Tue, 4 Oct 2011 09:18:00 -0700 (PDT) In-Reply-To: References: <20111002110331.GF1511@deviant.kiev.zoral.com.ua> Date: Wed, 5 Oct 2011 00:18:00 +0800 X-Google-Sender-Auth: BZ4MEpjKsmaFHCyxv0apS_DrmlQ Message-ID: From: Adrian Chadd To: "Jayachandran C." Content-Type: text/plain; charset=ISO-8859-1 Cc: Kostik Belousov , Alexander Motin , freebsd-mips@freebsd.org Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 16:18:01 -0000 On 4 October 2011 23:48, Adrian Chadd wrote: > Hi all, > > I've tried jc's patch. The hand-wavy, brief summary when tested on my > hostap (mips): > > * when doing single-stream, one way TCP tests (where it thus needs > TX/RX traffic to occur), I get 100% CPU utilisation - 50% interrupt, > 50% system, but the total interrupt rate isn't too high. It's much > higher than without his patch. I'll go digging later to see what's > going on. This turns out to be my fault. I seem to have somehow messed up something in one of my more recent commits. I'm quite certain that it won't have any impact on the results, as I never see the interrupt latency issue with bidirectional traffic. The UDP results are correct though - jc's stuff hasn't entirely fixed it. I'll do some more testing tomorrow morning and report what I find. g'night, Adrian From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 17:47:56 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D8CA71065670; Tue, 4 Oct 2011 17:47:56 +0000 (UTC) (envelope-from c.jayachandran@gmail.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 18C958FC19; Tue, 4 Oct 2011 17:47:55 +0000 (UTC) Received: by wyj26 with SMTP id 26so1088628wyj.13 for ; Tue, 04 Oct 2011 10:47:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=s94I4xWp3RdnYhIWZPboLE6AgTzzzlS+kMjZwA2LJqo=; b=ANQZfRPeilPBBicuQbiGMIgkc/m4g6xKpxG3PXTtDQ/V4jcY9lwFHbsfA5Aj2rbv+f nyY5EZsjNNfnH+PSOPd8uGxp38SBrxXBEQSl6s6cUFWzOpr4i2ATz/z4pggkUxN8Ep+X lMGHtWOV4GTG/ejBXMe1m/hWXjqLm0l8etqvU= MIME-Version: 1.0 Received: by 10.216.14.201 with SMTP id d51mr1783461wed.56.1317750474859; Tue, 04 Oct 2011 10:47:54 -0700 (PDT) Sender: c.jayachandran@gmail.com Received: by 10.216.29.78 with HTTP; Tue, 4 Oct 2011 10:47:54 -0700 (PDT) In-Reply-To: References: Date: Tue, 4 Oct 2011 23:17:54 +0530 X-Google-Sender-Auth: bCVXIL3NSltuI3eXt7mp3cyeMFM Message-ID: From: "Jayachandran C." To: Andrew Duane Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: Kostik Belousov , Alexander Motin , "freebsd-mips@freebsd.org" Subject: Re: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 17:47:56 -0000 On Tue, Oct 4, 2011 at 9:34 PM, Andrew Duane wrote: > The MIPS manual volume 3 says there is a 3 cycle "typical" wait between a= n MTC0 that messes with Status[IE] and an interrupted instruction. That haz= ard doesn't seem to apply here, to any of the cases we have. > > I do have a question: in StartWaitSkip, the value of Status[IE] is being = toggled, not cleared. Is that correct? Do we always guarantee that it will = be set on entry here? Interrupts have to be enabled in cpu_idle(), there is an assert in the beginning of cpu_idle which checks this. > I had also made a comment about the "PTR_ADDU k1, 16 =A0 =A0# skip over w= ait" in MipsKernIntr; I think it would be safer (and clearer) to do "PTR_LA= =A0 =A0 =A0 =A0k1, EndWaitSkip" instead. Loading an immediate address takes more instructions (esp in 64 bit) adding 16 is just one instruction. I should really add an KASSERT somewhere to make sure that EndWaitSkip - StartWaitSkip is 16... JC. From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 17:52:01 2011 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2DC00106564A; Tue, 4 Oct 2011 17:52:01 +0000 (UTC) (envelope-from aduane@juniper.net) Received: from exprod7og101.obsmtp.com (exprod7og101.obsmtp.com [64.18.2.155]) by mx1.freebsd.org (Postfix) with ESMTP id 3D5408FC14; Tue, 4 Oct 2011 17:51:58 +0000 (UTC) Received: from P-EMHUB01-HQ.jnpr.net ([66.129.224.36]) (using TLSv1) by exprod7ob101.postini.com ([64.18.6.12]) with SMTP; Tue, 04 Oct 2011 10:52:00 PDT Received: from p-emfe02-wf.jnpr.net (172.28.145.25) by P-EMHUB01-HQ.jnpr.net (172.24.192.35) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 4 Oct 2011 10:49:15 -0700 Received: from EMBX01-WF.jnpr.net ([fe80::1914:3299:33d9:e43b]) by p-emfe02-wf.jnpr.net ([fe80::c126:c633:d2dc:8090%11]) with mapi; Tue, 4 Oct 2011 13:49:14 -0400 From: Andrew Duane To: Jayachandran C. Date: Tue, 4 Oct 2011 13:49:13 -0400 Thread-Topic: svn commit: r225892 - head/sys/mips/mips Thread-Index: AcyCvcF6cG9ov6qZQcG5nXLeiN6ipAAABdqw Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: Alexander Motin , Kostik, "freebsd-mips@freebsd.org" , Belousov Subject: RE: svn commit: r225892 - head/sys/mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 17:52:01 -0000 An assert, or some other check would work. Could you just add "EndWaitSkip = - StartWaitSkip" somehow? I just worry that some day it won't be 16 bytes a= ny more.... =A0................................... Andrew Duane Juniper Networks o=A0=A0=A0+1 978 589 0551 m=A0 +1 603-770-7088 aduane@juniper.net =A0 > -----Original Message----- > From: c.jayachandran@gmail.com [mailto:c.jayachandran@gmail.com] On > Behalf Of Jayachandran C. > Sent: Tuesday, October 04, 2011 10:48 AM > To: Andrew Duane > Cc: Warner Losh; Adrian Chadd; Kostik Belousov; Alexander Motin; > freebsd-mips@freebsd.org > Subject: Re: svn commit: r225892 - head/sys/mips/mips >=20 > On Tue, Oct 4, 2011 at 9:34 PM, Andrew Duane > wrote: > > The MIPS manual volume 3 says there is a 3 cycle "typical" wait > between an MTC0 that messes with Status[IE] and an interrupted > instruction. That hazard doesn't seem to apply here, to any of the > cases we have. > > > > I do have a question: in StartWaitSkip, the value of Status[IE] is > being toggled, not cleared. Is that correct? Do we always guarantee > that it will be set on entry here? >=20 > Interrupts have to be enabled in cpu_idle(), there is an assert in the > beginning of cpu_idle which checks this. >=20 > > I had also made a comment about the "PTR_ADDU k1, 16 =A0 =A0# skip over > wait" in MipsKernIntr; I think it would be safer (and clearer) to do > "PTR_LA =A0 =A0 =A0 =A0k1, EndWaitSkip" instead. >=20 > Loading an immediate address takes more instructions (esp in 64 bit) > adding 16 is just one instruction. I should really add an KASSERT > somewhere to make sure that EndWaitSkip - StartWaitSkip is 16... >=20 > JC. From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 21:22:08 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9AB82106564A for ; Tue, 4 Oct 2011 21:22:08 +0000 (UTC) (envelope-from kostikbel@gmail.com) Received: from mail.zoral.com.ua (mx0.zoral.com.ua [91.193.166.200]) by mx1.freebsd.org (Postfix) with ESMTP id 073C88FC0C for ; Tue, 4 Oct 2011 21:22:07 +0000 (UTC) Received: from alf.home (alf.kiev.zoral.com.ua [10.1.1.177]) by mail.zoral.com.ua (8.14.2/8.14.2) with ESMTP id p94LBjKj068691 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 5 Oct 2011 00:11:45 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: from alf.home (kostik@localhost [127.0.0.1]) by alf.home (8.14.5/8.14.5) with ESMTP id p94LBjGV090424 for ; Wed, 5 Oct 2011 00:11:45 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: (from kostik@localhost) by alf.home (8.14.5/8.14.5/Submit) id p94LBj6S090423 for mips@freebsd.org; Wed, 5 Oct 2011 00:11:45 +0300 (EEST) (envelope-from kostikbel@gmail.com) X-Authentication-Warning: alf.home: kostik set sender to kostikbel@gmail.com using -f Date: Wed, 5 Oct 2011 00:11:44 +0300 From: Kostik Belousov To: mips@freebsd.org Message-ID: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="p3Avwa17mFFoJYCa" Content-Disposition: inline User-Agent: Mutt/1.4.2.3i X-Virus-Scanned: clamav-milter 0.95.2 at skuns.kiev.zoral.com.ua X-Virus-Status: Clean X-Spam-Status: No, score=-3.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00, DNS_FROM_OPENWHOIS autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on skuns.kiev.zoral.com.ua Cc: Subject: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 21:22:08 -0000 --p3Avwa17mFFoJYCa Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, below is the patch, test-compiled for XLP64 only, which converts the only remaining architecture MIPS to the new syscall entry sequence. The advantage of the conversion is sharing most of the code with all other architectures and avoiding duplication. Also, the implementation automatically feels the missed features for the MIPS, see the BUGS section in the ptrace(2). I am asking for you help to debug and test the patch. Please keep me on Cc:, I am not on the list. Thank you. diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h index 11a1f8e..4c0b0b6 100644 --- a/sys/mips/include/proc.h +++ b/sys/mips/include/proc.h @@ -67,11 +67,22 @@ struct mdproc { /* empty */ }; =20 +#ifdef _KERNEL struct thread; =20 void mips_cpu_switch(struct thread *, struct thread *, struct mtx *); void mips_cpu_throw(struct thread *, struct thread *); =20 +struct syscall_args { + u_int code; + struct sysent *callp; + register_t args[8]; + int narg; + struct trapframe *trapframe; +}; +#define HAVE_SYSCALL_ARGS_DEF 1 +#endif + #ifdef __mips_n64 #define KINFO_PROC_SIZE 1088 #else diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c index c800e71..9755c70 100644 --- a/sys/mips/mips/trap.c +++ b/sys/mips/mips/trap.c @@ -261,6 +261,133 @@ static int emulate_unaligned_access(struct trapframe = *frame, int mode); =20 extern void fswintrberr(void); /* XXX */ =20 +int +cpu_fetch_syscall_args(struct thread *td, struct syscall_args *sa) +{ + struct trapframe *locr0 =3D td->td_frame; + struct sysentvec *se; + int error, nsaved; + + bzero(sa->args, sizeof(sa->args)); + + /* compute next PC after syscall instruction */ + td->td_pcb->pcb_tpc =3D sa->trapframe->pc; /* Remember if restart */ + if (DELAYBRANCH(sa->trapframe->cause)) /* Check BD bit */ + locr0->pc =3D MipsEmulateBranch(locr0, sa->trapframe->pc, 0, 0); + else + locr0->pc +=3D sizeof(int); + sa->code =3D locr0->v0; + + switch (sa->code) { +#if defined(__mips_n32) || defined(__mips_n64) + case SYS___syscall: + /* + * Quads fit in a single register in + * new ABIs. + * + * XXX o64? + */ +#endif + case SYS_syscall: + /* + * Code is first argument, followed by + * actual args. + */ + sa->code =3D locr0->a0; + sa->args[0] =3D locr0->a1; + sa->args[1] =3D locr0->a2; + sa->args[2] =3D locr0->a3; + nsaved =3D 3; +#if defined(__mips_n32) || defined(__mips_n64) + sa->args[3] =3D locr0->t4; + sa->args[4] =3D locr0->t5; + sa->args[5] =3D locr0->t6; + sa->args[6] =3D locr0->t7; + nsaved +=3D 4; +#endif + break; + +#if defined(__mips_o32) + case SYS___syscall: + /* + * Like syscall, but code is a quad, so as + * to maintain quad alignment for the rest + * of the arguments. + */ + if (_QUAD_LOWWORD =3D=3D 0) + sa->code =3D locr0->a0; + else + sa->code =3D locr0->a1; + sa->args[0] =3D locr0->a2; + sa->args[1] =3D locr0->a3; + nsaved =3D 2; + break; +#endif + + default: + sa->args[0] =3D locr0->a0; + sa->args[1] =3D locr0->a1; + sa->args[2] =3D locr0->a2; + sa->args[3] =3D locr0->a3; + nsaved =3D 4; +#if defined (__mips_n32) || defined(__mips_n64) + sa->args[4] =3D locr0->t4; + sa->args[5] =3D locr0->t5; + sa->args[6] =3D locr0->t6; + sa->args[7] =3D locr0->t7; + nsaved +=3D 4; +#endif + break; + } +#ifdef TRAP_DEBUG + if (trap_debug) + printf("SYSCALL #%d pid:%u\n", code, p->p_pid); +#endif + + se =3D td->td_proc->p_sysent; + if (se->sv_mask) + sa->code &=3D se->sv_mask; + + if (sa->code >=3D se->sv_size) + sa->callp =3D &se->sv_table[0]; + else + sa->callp =3D &se->sv_table[sa->code]; + + sa->narg =3D sa->callp->sy_narg; + + if (sa->narg > nsaved) { +#if defined(__mips_n32) || defined(__mips_n64) + /* + * XXX + * Is this right for new ABIs? I think the 4 there + * should be 8, size there are 8 registers to skip, + * not 4, but I'm not certain. + */ + printf("SYSCALL #%u pid:%u, nargs > nsaved.\n", sa->code, + td->td_proc->p_pid); +#endif + error =3D copyin((caddr_t)(intptr_t)(locr0->sp + + 4 * sizeof(register_t)), (caddr_t)&sa->args[nsaved], + (u_int)(sa->narg - nsaved) * sizeof(register_t)); + if (error !=3D 0) { + locr0->v0 =3D error; + locr0->a3 =3D 1; + } + } else + error =3D 0; + + if (error =3D=3D 0) { + td->td_retval[0] =3D 0; + td->td_retval[1] =3D locr0->v1; + } + + return (error); +} + +#undef __FBSDID +#define __FBSDID(x) +#include "../../kern/subr_syscall.c" + /* * Handle an exception. * Called from MipsKernGenException() or MipsUserGenException() @@ -527,155 +654,11 @@ dofault: =20 case T_SYSCALL + T_USER: { - struct trapframe *locr0 =3D td->td_frame; - struct sysent *callp; - unsigned int code; - int nargs, nsaved; - register_t args[8]; - - bzero(args, sizeof args); - - /* - * note: PCPU_LAZY_INC() can only be used if we can - * afford occassional inaccuracy in the count. - */ - PCPU_LAZY_INC(cnt.v_syscall); - if (td->td_ucred !=3D p->p_ucred) - cred_update_thread(td); -#ifdef KSE - if (p->p_flag & P_SA) - thread_user_enter(td); -#endif - /* compute next PC after syscall instruction */ - td->td_pcb->pcb_tpc =3D trapframe->pc; /* Remember if restart */ - if (DELAYBRANCH(trapframe->cause)) { /* Check BD bit */ - locr0->pc =3D MipsEmulateBranch(locr0, trapframe->pc, 0, - 0); - } else { - locr0->pc +=3D sizeof(int); - } - code =3D locr0->v0; + struct syscall_args sa; + int error; =20 - switch (code) { -#if defined(__mips_n32) || defined(__mips_n64) - case SYS___syscall: - /* - * Quads fit in a single register in - * new ABIs. - * - * XXX o64? - */ -#endif - case SYS_syscall: - /* - * Code is first argument, followed by - * actual args. - */ - code =3D locr0->a0; - args[0] =3D locr0->a1; - args[1] =3D locr0->a2; - args[2] =3D locr0->a3; - nsaved =3D 3; -#if defined(__mips_n32) || defined(__mips_n64) - args[3] =3D locr0->t4; - args[4] =3D locr0->t5; - args[5] =3D locr0->t6; - args[6] =3D locr0->t7; - nsaved +=3D 4; -#endif - break; - -#if defined(__mips_o32) - case SYS___syscall: - /* - * Like syscall, but code is a quad, so as - * to maintain quad alignment for the rest - * of the arguments. - */ - if (_QUAD_LOWWORD =3D=3D 0) { - code =3D locr0->a0; - } else { - code =3D locr0->a1; - } - args[0] =3D locr0->a2; - args[1] =3D locr0->a3; - nsaved =3D 2; - break; -#endif - - default: - args[0] =3D locr0->a0; - args[1] =3D locr0->a1; - args[2] =3D locr0->a2; - args[3] =3D locr0->a3; - nsaved =3D 4; -#if defined (__mips_n32) || defined(__mips_n64) - args[4] =3D locr0->t4; - args[5] =3D locr0->t5; - args[6] =3D locr0->t6; - args[7] =3D locr0->t7; - nsaved +=3D 4; -#endif - } -#ifdef TRAP_DEBUG - if (trap_debug) { - printf("SYSCALL #%d pid:%u\n", code, p->p_pid); - } -#endif - - if (p->p_sysent->sv_mask) - code &=3D p->p_sysent->sv_mask; - - if (code >=3D p->p_sysent->sv_size) - callp =3D &p->p_sysent->sv_table[0]; - else - callp =3D &p->p_sysent->sv_table[code]; - - nargs =3D callp->sy_narg; - - if (nargs > nsaved) { -#if defined(__mips_n32) || defined(__mips_n64) - /* - * XXX - * Is this right for new ABIs? I think the 4 there - * should be 8, size there are 8 registers to skip, - * not 4, but I'm not certain. - */ - printf("SYSCALL #%u pid:%u, nargs > nsaved.\n", code, p->p_pid); -#endif - i =3D copyin((caddr_t)(intptr_t)(locr0->sp + - 4 * sizeof(register_t)), (caddr_t)&args[nsaved], - (u_int)(nargs - nsaved) * sizeof(register_t)); - if (i) { - locr0->v0 =3D i; - locr0->a3 =3D 1; -#ifdef KTRACE - if (KTRPOINT(td, KTR_SYSCALL)) - ktrsyscall(code, nargs, args); -#endif - goto done; - } - } -#ifdef TRAP_DEBUG - if (trap_debug) { - for (i =3D 0; i < nargs; i++) { - printf("args[%d] =3D %#jx\n", i, (intmax_t)args[i]); - } - } -#endif -#ifdef SYSCALL_TRACING - printf("%s(", syscallnames[code]); - for (i =3D 0; i < nargs; i++) { - printf("%s%#jx", i =3D=3D 0 ? "" : ", ", (intmax_t)args[i]); - } - printf(")\n"); -#endif -#ifdef KTRACE - if (KTRPOINT(td, KTR_SYSCALL)) - ktrsyscall(code, nargs, args); -#endif - td->td_retval[0] =3D 0; - td->td_retval[1] =3D locr0->v1; + sa.trapframe =3D trapframe; + error =3D syscallenter(td, &sa); =20 #if !defined(SMP) && (defined(DDB) || defined(DEBUG)) if (trp =3D=3D trapdebug) @@ -683,21 +666,7 @@ dofault: else trp[-1].code =3D code; #endif - STOPEVENT(p, S_SCE, nargs); - - PTRACESTOP_SC(p, td, S_PT_SCE); - i =3D (*callp->sy_call) (td, args); -#if 0 - /* - * Reinitialize proc pointer `p' as it may be - * different if this is a child returning from fork - * syscall. - */ - td =3D curthread; - locr0 =3D td->td_frame; -#endif trapdebug_enter(locr0, -code); - cpu_set_syscall_retval(td, i); =20 /* * The sync'ing of I & D caches for SYS_ptrace() is @@ -705,38 +674,7 @@ dofault: * instead of being done here under a special check * for SYS_ptrace(). */ - done: - /* - * Check for misbehavior. - */ - WITNESS_WARN(WARN_PANIC, NULL, "System call %s returning", - (code >=3D 0 && code < SYS_MAXSYSCALL) ? - syscallnames[code] : "???"); - KASSERT(td->td_critnest =3D=3D 0, - ("System call %s returning in a critical section", - (code >=3D 0 && code < SYS_MAXSYSCALL) ? - syscallnames[code] : "???")); - KASSERT(td->td_locks =3D=3D 0, - ("System call %s returning with %d locks held", - (code >=3D 0 && code < SYS_MAXSYSCALL) ? - syscallnames[code] : "???", - td->td_locks)); - userret(td, trapframe); -#ifdef KTRACE - if (KTRPOINT(td, KTR_SYSRET)) - ktrsysret(code, i, td->td_retval[0]); -#endif - /* - * This works because errno is findable through the - * register set. If we ever support an emulation - * where this is not the case, this code will need - * to be revisited. - */ - STOPEVENT(p, S_SCX, code); - - PTRACESTOP_SC(p, td, S_PT_SCX); - - mtx_assert(&Giant, MA_NOTOWNED); + syscallret(td, error, &sa); return (trapframe->pc); } =20 --p3Avwa17mFFoJYCa Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.18 (FreeBSD) iEYEARECAAYFAk6LdpAACgkQC3+MBN1Mb4gz3ACgg7idBOErJyvCutgUP0GjySX6 P+kAn1a4yo7UHfgEFwpwXriITO1ZCaTr =/YZW -----END PGP SIGNATURE----- --p3Avwa17mFFoJYCa-- From owner-freebsd-mips@FreeBSD.ORG Tue Oct 4 21:52:24 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8295E106566B for ; Tue, 4 Oct 2011 21:52:24 +0000 (UTC) (envelope-from kostikbel@gmail.com) Received: from mail.zoral.com.ua (mx0.zoral.com.ua [91.193.166.200]) by mx1.freebsd.org (Postfix) with ESMTP id 9867C8FC0C for ; Tue, 4 Oct 2011 21:52:23 +0000 (UTC) Received: from alf.home (alf.kiev.zoral.com.ua [10.1.1.177]) by mail.zoral.com.ua (8.14.2/8.14.2) with ESMTP id p94LqImg088904 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 5 Oct 2011 00:52:18 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: from alf.home (kostik@localhost [127.0.0.1]) by alf.home (8.14.5/8.14.5) with ESMTP id p94LqI5K090635 for ; Wed, 5 Oct 2011 00:52:18 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: (from kostik@localhost) by alf.home (8.14.5/8.14.5/Submit) id p94LqIEk090634 for mips@freebsd.org; Wed, 5 Oct 2011 00:52:18 +0300 (EEST) (envelope-from kostikbel@gmail.com) X-Authentication-Warning: alf.home: kostik set sender to kostikbel@gmail.com using -f Date: Wed, 5 Oct 2011 00:52:18 +0300 From: Kostik Belousov To: mips@freebsd.org Message-ID: <20111004215218.GY1511@deviant.kiev.zoral.com.ua> References: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="GKxt9isuFuuOF2/C" Content-Disposition: inline In-Reply-To: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> User-Agent: Mutt/1.4.2.3i X-Virus-Scanned: clamav-milter 0.95.2 at skuns.kiev.zoral.com.ua X-Virus-Status: Clean X-Spam-Status: No, score=-3.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00, DNS_FROM_OPENWHOIS autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on skuns.kiev.zoral.com.ua Cc: Subject: Re: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Oct 2011 21:52:24 -0000 --GKxt9isuFuuOF2/C Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Oct 05, 2011 at 12:11:44AM +0300, Kostik Belousov wrote: > Hi, > below is the patch, test-compiled for XLP64 only, which converts the > only remaining architecture MIPS to the new syscall entry sequence. > The advantage of the conversion is sharing most of the code with all > other architectures and avoiding duplication. Also, the implementation > automatically feels the missed features for the MIPS, see the BUGS s/feels/fills/, sorry > section in the ptrace(2). For the same reason, capsicum shall not work on MIPS. >=20 > I am asking for you help to debug and test the patch. Please keep me > on Cc:, I am not on the list. >=20 > Thank you. >=20 > diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h > index 11a1f8e..4c0b0b6 100644 > --- a/sys/mips/include/proc.h > +++ b/sys/mips/include/proc.h > @@ -67,11 +67,22 @@ struct mdproc { > /* empty */ > }; > =20 > +#ifdef _KERNEL > struct thread; > =20 > void mips_cpu_switch(struct thread *, struct thread *, struct mtx *); > void mips_cpu_throw(struct thread *, struct thread *); > =20 > +struct syscall_args { > + u_int code; > + struct sysent *callp; > + register_t args[8]; > + int narg; > + struct trapframe *trapframe; > +}; > +#define HAVE_SYSCALL_ARGS_DEF 1 > +#endif > + > #ifdef __mips_n64 > #define KINFO_PROC_SIZE 1088 > #else > diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c > index c800e71..9755c70 100644 > --- a/sys/mips/mips/trap.c > +++ b/sys/mips/mips/trap.c > @@ -261,6 +261,133 @@ static int emulate_unaligned_access(struct trapfram= e *frame, int mode); > =20 > extern void fswintrberr(void); /* XXX */ > =20 > +int > +cpu_fetch_syscall_args(struct thread *td, struct syscall_args *sa) > +{ > + struct trapframe *locr0 =3D td->td_frame; > + struct sysentvec *se; > + int error, nsaved; > + > + bzero(sa->args, sizeof(sa->args)); > + > + /* compute next PC after syscall instruction */ > + td->td_pcb->pcb_tpc =3D sa->trapframe->pc; /* Remember if restart */ > + if (DELAYBRANCH(sa->trapframe->cause)) /* Check BD bit */ > + locr0->pc =3D MipsEmulateBranch(locr0, sa->trapframe->pc, 0, 0); > + else > + locr0->pc +=3D sizeof(int); > + sa->code =3D locr0->v0; > + > + switch (sa->code) { > +#if defined(__mips_n32) || defined(__mips_n64) > + case SYS___syscall: > + /* > + * Quads fit in a single register in > + * new ABIs. > + * > + * XXX o64? > + */ > +#endif > + case SYS_syscall: > + /* > + * Code is first argument, followed by > + * actual args. > + */ > + sa->code =3D locr0->a0; > + sa->args[0] =3D locr0->a1; > + sa->args[1] =3D locr0->a2; > + sa->args[2] =3D locr0->a3; > + nsaved =3D 3; > +#if defined(__mips_n32) || defined(__mips_n64) > + sa->args[3] =3D locr0->t4; > + sa->args[4] =3D locr0->t5; > + sa->args[5] =3D locr0->t6; > + sa->args[6] =3D locr0->t7; > + nsaved +=3D 4; > +#endif > + break; > + > +#if defined(__mips_o32) > + case SYS___syscall: > + /* > + * Like syscall, but code is a quad, so as > + * to maintain quad alignment for the rest > + * of the arguments. > + */ > + if (_QUAD_LOWWORD =3D=3D 0) > + sa->code =3D locr0->a0; > + else > + sa->code =3D locr0->a1; > + sa->args[0] =3D locr0->a2; > + sa->args[1] =3D locr0->a3; > + nsaved =3D 2; > + break; > +#endif > + > + default: > + sa->args[0] =3D locr0->a0; > + sa->args[1] =3D locr0->a1; > + sa->args[2] =3D locr0->a2; > + sa->args[3] =3D locr0->a3; > + nsaved =3D 4; > +#if defined (__mips_n32) || defined(__mips_n64) > + sa->args[4] =3D locr0->t4; > + sa->args[5] =3D locr0->t5; > + sa->args[6] =3D locr0->t6; > + sa->args[7] =3D locr0->t7; > + nsaved +=3D 4; > +#endif > + break; > + } > +#ifdef TRAP_DEBUG > + if (trap_debug) > + printf("SYSCALL #%d pid:%u\n", code, p->p_pid); > +#endif > + > + se =3D td->td_proc->p_sysent; > + if (se->sv_mask) > + sa->code &=3D se->sv_mask; > + > + if (sa->code >=3D se->sv_size) > + sa->callp =3D &se->sv_table[0]; > + else > + sa->callp =3D &se->sv_table[sa->code]; > + > + sa->narg =3D sa->callp->sy_narg; > + > + if (sa->narg > nsaved) { > +#if defined(__mips_n32) || defined(__mips_n64) > + /* > + * XXX > + * Is this right for new ABIs? I think the 4 there > + * should be 8, size there are 8 registers to skip, > + * not 4, but I'm not certain. > + */ > + printf("SYSCALL #%u pid:%u, nargs > nsaved.\n", sa->code, > + td->td_proc->p_pid); > +#endif > + error =3D copyin((caddr_t)(intptr_t)(locr0->sp + > + 4 * sizeof(register_t)), (caddr_t)&sa->args[nsaved], > + (u_int)(sa->narg - nsaved) * sizeof(register_t)); > + if (error !=3D 0) { > + locr0->v0 =3D error; > + locr0->a3 =3D 1; > + } > + } else > + error =3D 0; > + > + if (error =3D=3D 0) { > + td->td_retval[0] =3D 0; > + td->td_retval[1] =3D locr0->v1; > + } > + > + return (error); > +} > + > +#undef __FBSDID > +#define __FBSDID(x) > +#include "../../kern/subr_syscall.c" > + > /* > * Handle an exception. > * Called from MipsKernGenException() or MipsUserGenException() > @@ -527,155 +654,11 @@ dofault: > =20 > case T_SYSCALL + T_USER: > { > - struct trapframe *locr0 =3D td->td_frame; > - struct sysent *callp; > - unsigned int code; > - int nargs, nsaved; > - register_t args[8]; > - > - bzero(args, sizeof args); > - > - /* > - * note: PCPU_LAZY_INC() can only be used if we can > - * afford occassional inaccuracy in the count. > - */ > - PCPU_LAZY_INC(cnt.v_syscall); > - if (td->td_ucred !=3D p->p_ucred) > - cred_update_thread(td); > -#ifdef KSE > - if (p->p_flag & P_SA) > - thread_user_enter(td); > -#endif > - /* compute next PC after syscall instruction */ > - td->td_pcb->pcb_tpc =3D trapframe->pc; /* Remember if restart */ > - if (DELAYBRANCH(trapframe->cause)) { /* Check BD bit */ > - locr0->pc =3D MipsEmulateBranch(locr0, trapframe->pc, 0, > - 0); > - } else { > - locr0->pc +=3D sizeof(int); > - } > - code =3D locr0->v0; > + struct syscall_args sa; > + int error; > =20 > - switch (code) { > -#if defined(__mips_n32) || defined(__mips_n64) > - case SYS___syscall: > - /* > - * Quads fit in a single register in > - * new ABIs. > - * > - * XXX o64? > - */ > -#endif > - case SYS_syscall: > - /* > - * Code is first argument, followed by > - * actual args. > - */ > - code =3D locr0->a0; > - args[0] =3D locr0->a1; > - args[1] =3D locr0->a2; > - args[2] =3D locr0->a3; > - nsaved =3D 3; > -#if defined(__mips_n32) || defined(__mips_n64) > - args[3] =3D locr0->t4; > - args[4] =3D locr0->t5; > - args[5] =3D locr0->t6; > - args[6] =3D locr0->t7; > - nsaved +=3D 4; > -#endif > - break; > - > -#if defined(__mips_o32) > - case SYS___syscall: > - /* > - * Like syscall, but code is a quad, so as > - * to maintain quad alignment for the rest > - * of the arguments. > - */ > - if (_QUAD_LOWWORD =3D=3D 0) { > - code =3D locr0->a0; > - } else { > - code =3D locr0->a1; > - } > - args[0] =3D locr0->a2; > - args[1] =3D locr0->a3; > - nsaved =3D 2; > - break; > -#endif > - > - default: > - args[0] =3D locr0->a0; > - args[1] =3D locr0->a1; > - args[2] =3D locr0->a2; > - args[3] =3D locr0->a3; > - nsaved =3D 4; > -#if defined (__mips_n32) || defined(__mips_n64) > - args[4] =3D locr0->t4; > - args[5] =3D locr0->t5; > - args[6] =3D locr0->t6; > - args[7] =3D locr0->t7; > - nsaved +=3D 4; > -#endif > - } > -#ifdef TRAP_DEBUG > - if (trap_debug) { > - printf("SYSCALL #%d pid:%u\n", code, p->p_pid); > - } > -#endif > - > - if (p->p_sysent->sv_mask) > - code &=3D p->p_sysent->sv_mask; > - > - if (code >=3D p->p_sysent->sv_size) > - callp =3D &p->p_sysent->sv_table[0]; > - else > - callp =3D &p->p_sysent->sv_table[code]; > - > - nargs =3D callp->sy_narg; > - > - if (nargs > nsaved) { > -#if defined(__mips_n32) || defined(__mips_n64) > - /* > - * XXX > - * Is this right for new ABIs? I think the 4 there > - * should be 8, size there are 8 registers to skip, > - * not 4, but I'm not certain. > - */ > - printf("SYSCALL #%u pid:%u, nargs > nsaved.\n", code, p->p_pid); > -#endif > - i =3D copyin((caddr_t)(intptr_t)(locr0->sp + > - 4 * sizeof(register_t)), (caddr_t)&args[nsaved], > - (u_int)(nargs - nsaved) * sizeof(register_t)); > - if (i) { > - locr0->v0 =3D i; > - locr0->a3 =3D 1; > -#ifdef KTRACE > - if (KTRPOINT(td, KTR_SYSCALL)) > - ktrsyscall(code, nargs, args); > -#endif > - goto done; > - } > - } > -#ifdef TRAP_DEBUG > - if (trap_debug) { > - for (i =3D 0; i < nargs; i++) { > - printf("args[%d] =3D %#jx\n", i, (intmax_t)args[i]); > - } > - } > -#endif > -#ifdef SYSCALL_TRACING > - printf("%s(", syscallnames[code]); > - for (i =3D 0; i < nargs; i++) { > - printf("%s%#jx", i =3D=3D 0 ? "" : ", ", (intmax_t)args[i]); > - } > - printf(")\n"); > -#endif > -#ifdef KTRACE > - if (KTRPOINT(td, KTR_SYSCALL)) > - ktrsyscall(code, nargs, args); > -#endif > - td->td_retval[0] =3D 0; > - td->td_retval[1] =3D locr0->v1; > + sa.trapframe =3D trapframe; > + error =3D syscallenter(td, &sa); > =20 > #if !defined(SMP) && (defined(DDB) || defined(DEBUG)) > if (trp =3D=3D trapdebug) > @@ -683,21 +666,7 @@ dofault: > else > trp[-1].code =3D code; > #endif > - STOPEVENT(p, S_SCE, nargs); > - > - PTRACESTOP_SC(p, td, S_PT_SCE); > - i =3D (*callp->sy_call) (td, args); > -#if 0 > - /* > - * Reinitialize proc pointer `p' as it may be > - * different if this is a child returning from fork > - * syscall. > - */ > - td =3D curthread; > - locr0 =3D td->td_frame; > -#endif > trapdebug_enter(locr0, -code); > - cpu_set_syscall_retval(td, i); > =20 > /* > * The sync'ing of I & D caches for SYS_ptrace() is > @@ -705,38 +674,7 @@ dofault: > * instead of being done here under a special check > * for SYS_ptrace(). > */ > - done: > - /* > - * Check for misbehavior. > - */ > - WITNESS_WARN(WARN_PANIC, NULL, "System call %s returning", > - (code >=3D 0 && code < SYS_MAXSYSCALL) ? > - syscallnames[code] : "???"); > - KASSERT(td->td_critnest =3D=3D 0, > - ("System call %s returning in a critical section", > - (code >=3D 0 && code < SYS_MAXSYSCALL) ? > - syscallnames[code] : "???")); > - KASSERT(td->td_locks =3D=3D 0, > - ("System call %s returning with %d locks held", > - (code >=3D 0 && code < SYS_MAXSYSCALL) ? > - syscallnames[code] : "???", > - td->td_locks)); > - userret(td, trapframe); > -#ifdef KTRACE > - if (KTRPOINT(td, KTR_SYSRET)) > - ktrsysret(code, i, td->td_retval[0]); > -#endif > - /* > - * This works because errno is findable through the > - * register set. If we ever support an emulation > - * where this is not the case, this code will need > - * to be revisited. > - */ > - STOPEVENT(p, S_SCX, code); > - > - PTRACESTOP_SC(p, td, S_PT_SCX); > - > - mtx_assert(&Giant, MA_NOTOWNED); > + syscallret(td, error, &sa); > return (trapframe->pc); > } > =20 --GKxt9isuFuuOF2/C Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.18 (FreeBSD) iEYEARECAAYFAk6LgBIACgkQC3+MBN1Mb4iM7wCgkpuaW287HeD0JK5UeQwfLzvh WG0AoIGtxYkCeoLN1suM6VmhEgUtPIMA =qTZU -----END PGP SIGNATURE----- --GKxt9isuFuuOF2/C-- From owner-freebsd-mips@FreeBSD.ORG Wed Oct 5 12:06:11 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A9EA5106566B for ; Wed, 5 Oct 2011 12:06:11 +0000 (UTC) (envelope-from c.jayachandran@gmail.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 1172C8FC08 for ; Wed, 5 Oct 2011 12:06:10 +0000 (UTC) Received: by wyj26 with SMTP id 26so2168238wyj.13 for ; Wed, 05 Oct 2011 05:06:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=gtHDZV875O+XfM1/6UWICRWTH6p8NWR/B/yblG6zlaQ=; b=hlfvdMKx5nub8Q5S2c6qly8f4UdJ6ndria4gM32ZemHNcpHv+HqQFm5SCTOtvMxmA2 b7nCID985UGucaiZFQ16h3E3vbvTTdeaSfz5slBwxengcNF69EX3MObIFZxt/vSE7maZ sc+zZZoJ2udtq8RTQOJKjnSvS90zpTNLlBhXk= MIME-Version: 1.0 Received: by 10.216.14.201 with SMTP id d51mr2921128wed.56.1317814556240; Wed, 05 Oct 2011 04:35:56 -0700 (PDT) Received: by 10.216.29.78 with HTTP; Wed, 5 Oct 2011 04:35:55 -0700 (PDT) In-Reply-To: <20111004215218.GY1511@deviant.kiev.zoral.com.ua> References: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> <20111004215218.GY1511@deviant.kiev.zoral.com.ua> Date: Wed, 5 Oct 2011 17:05:55 +0530 Message-ID: From: "Jayachandran C." To: Kostik Belousov Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: mips@freebsd.org Subject: Re: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2011 12:06:11 -0000 On Wed, Oct 5, 2011 at 3:22 AM, Kostik Belousov wrote= : > On Wed, Oct 05, 2011 at 12:11:44AM +0300, Kostik Belousov wrote: >> Hi, >> below is the patch, test-compiled for XLP64 only, which converts the >> only remaining architecture MIPS to the new syscall entry sequence. >> The advantage of the conversion is sharing most of the code with all >> other architectures and avoiding duplication. Also, the implementation >> automatically feels the missed features for the MIPS, see the BUGS > s/feels/fills/, sorry >> section in the ptrace(2). > For the same reason, capsicum shall not work on MIPS. > >> >> I am asking for you help to debug and test the patch. Please keep me >> on Cc:, I am not on the list. >> >> Thank you. >> >> diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h >> index 11a1f8e..4c0b0b6 100644 >> --- a/sys/mips/include/proc.h >> +++ b/sys/mips/include/proc.h >> @@ -67,11 +67,22 @@ struct mdproc { >> =A0 =A0 =A0 /* empty */ >> =A0}; >> >> +#ifdef _KERNEL >> =A0struct thread; >> >> =A0void mips_cpu_switch(struct thread *, struct thread *, struct mtx *); >> =A0void mips_cpu_throw(struct thread *, struct thread *); >> >> +struct syscall_args { >> + =A0 =A0 u_int code; >> + =A0 =A0 struct sysent *callp; >> + =A0 =A0 register_t args[8]; >> + =A0 =A0 int narg; >> + =A0 =A0 struct trapframe *trapframe; >> +}; >> +#define =A0 =A0 =A0HAVE_SYSCALL_ARGS_DEF 1 >> +#endif >> + >> =A0#ifdef __mips_n64 >> =A0#define =A0 =A0 =A0KINFO_PROC_SIZE 1088 >> =A0#else >> diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c >> index c800e71..9755c70 100644 >> --- a/sys/mips/mips/trap.c >> +++ b/sys/mips/mips/trap.c >> @@ -261,6 +261,133 @@ static int emulate_unaligned_access(struct trapfra= me *frame, int mode); >> >> =A0extern void fswintrberr(void); /* XXX */ >> >> +int >> +cpu_fetch_syscall_args(struct thread *td, struct syscall_args *sa) >> +{ >> + =A0 =A0 struct trapframe *locr0 =3D td->td_frame; >> + =A0 =A0 struct sysentvec *se; >> + =A0 =A0 int error, nsaved; >> + >> + =A0 =A0 bzero(sa->args, sizeof(sa->args)); >> + >> + =A0 =A0 /* compute next PC after syscall instruction */ >> + =A0 =A0 td->td_pcb->pcb_tpc =3D sa->trapframe->pc; /* Remember if rest= art */ >> + =A0 =A0 if (DELAYBRANCH(sa->trapframe->cause)) =A0 /* Check BD bit */ >> + =A0 =A0 =A0 =A0 =A0 =A0 locr0->pc =3D MipsEmulateBranch(locr0, sa->tra= pframe->pc, 0, 0); >> + =A0 =A0 else >> + =A0 =A0 =A0 =A0 =A0 =A0 locr0->pc +=3D sizeof(int); >> + =A0 =A0 sa->code =3D locr0->v0; >> + >> + =A0 =A0 switch (sa->code) { >> +#if defined(__mips_n32) || defined(__mips_n64) >> + =A0 =A0 case SYS___syscall: >> + =A0 =A0 =A0 =A0 =A0 =A0 /* >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* Quads fit in a single register in >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* new ABIs. >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* XXX o64? >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> +#endif >> + =A0 =A0 case SYS_syscall: >> + =A0 =A0 =A0 =A0 =A0 =A0 /* >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* Code is first argument, followed by >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* actual args. >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->code =3D locr0->a0; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[0] =3D locr0->a1; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[1] =3D locr0->a2; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[2] =3D locr0->a3; >> + =A0 =A0 =A0 =A0 =A0 =A0 nsaved =3D 3; >> +#if defined(__mips_n32) || defined(__mips_n64) >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[3] =3D locr0->t4; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[4] =3D locr0->t5; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[5] =3D locr0->t6; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[6] =3D locr0->t7; >> + =A0 =A0 =A0 =A0 =A0 =A0 nsaved +=3D 4; >> +#endif >> + =A0 =A0 =A0 =A0 =A0 =A0 break; >> + >> +#if defined(__mips_o32) >> + =A0 =A0 case SYS___syscall: >> + =A0 =A0 =A0 =A0 =A0 =A0 /* >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* Like syscall, but code is a quad, so as >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* to maintain quad alignment for the rest >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* of the arguments. >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> + =A0 =A0 =A0 =A0 =A0 =A0 if (_QUAD_LOWWORD =3D=3D 0) >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 sa->code =3D locr0->a0; >> + =A0 =A0 =A0 =A0 =A0 =A0 else >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 sa->code =3D locr0->a1; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[0] =3D locr0->a2; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[1] =3D locr0->a3; >> + =A0 =A0 =A0 =A0 =A0 =A0 nsaved =3D 2; >> + =A0 =A0 =A0 =A0 =A0 =A0 break; >> +#endif >> + >> + =A0 =A0 default: >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[0] =3D locr0->a0; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[1] =3D locr0->a1; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[2] =3D locr0->a2; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[3] =3D locr0->a3; >> + =A0 =A0 =A0 =A0 =A0 =A0 nsaved =3D 4; >> +#if defined (__mips_n32) || defined(__mips_n64) >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[4] =3D locr0->t4; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[5] =3D locr0->t5; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[6] =3D locr0->t6; >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->args[7] =3D locr0->t7; >> + =A0 =A0 =A0 =A0 =A0 =A0 nsaved +=3D 4; >> +#endif >> + =A0 =A0 =A0 =A0 =A0 =A0 break; >> + =A0 =A0 } >> +#ifdef TRAP_DEBUG >> + =A0 =A0 if (trap_debug) >> + =A0 =A0 =A0 =A0 =A0 =A0 printf("SYSCALL #%d pid:%u\n", code, p->p_pid)= ; >> +#endif >> + >> + =A0 =A0 se =3D td->td_proc->p_sysent; >> + =A0 =A0 if (se->sv_mask) >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->code &=3D se->sv_mask; >> + >> + =A0 =A0 if (sa->code >=3D se->sv_size) >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->callp =3D &se->sv_table[0]; >> + =A0 =A0 else >> + =A0 =A0 =A0 =A0 =A0 =A0 sa->callp =3D &se->sv_table[sa->code]; >> + >> + =A0 =A0 sa->narg =3D sa->callp->sy_narg; >> + >> + =A0 =A0 if (sa->narg > nsaved) { >> +#if defined(__mips_n32) || defined(__mips_n64) >> + =A0 =A0 =A0 =A0 =A0 =A0 /* >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* XXX >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* Is this right for new ABIs? =A0I think th= e 4 there >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* should be 8, size there are 8 registers t= o skip, >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0* not 4, but I'm not certain. >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> + =A0 =A0 =A0 =A0 =A0 =A0 printf("SYSCALL #%u pid:%u, nargs > nsaved.\n"= , sa->code, >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 td->td_proc->p_pid); >> +#endif >> + =A0 =A0 =A0 =A0 =A0 =A0 error =3D copyin((caddr_t)(intptr_t)(locr0->sp= + >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 4 * sizeof(register_t)), (caddr_t)&sa-= >args[nsaved], >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(u_int)(sa->narg - nsaved) * sizeof(reg= ister_t)); >> + =A0 =A0 =A0 =A0 =A0 =A0 if (error !=3D 0) { >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 locr0->v0 =3D error; >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 locr0->a3 =3D 1; >> + =A0 =A0 =A0 =A0 =A0 =A0 } >> + =A0 =A0 } else >> + =A0 =A0 =A0 =A0 =A0 =A0 error =3D 0; >> + >> + =A0 =A0 if (error =3D=3D 0) { >> + =A0 =A0 =A0 =A0 =A0 =A0 td->td_retval[0] =3D 0; >> + =A0 =A0 =A0 =A0 =A0 =A0 td->td_retval[1] =3D locr0->v1; >> + =A0 =A0 } >> + >> + =A0 =A0 return (error); >> +} >> + >> +#undef __FBSDID >> +#define __FBSDID(x) >> +#include "../../kern/subr_syscall.c" >> + >> =A0/* >> =A0 * Handle an exception. >> =A0 * Called from MipsKernGenException() or MipsUserGenException() >> @@ -527,155 +654,11 @@ dofault: >> >> =A0 =A0 =A0 case T_SYSCALL + T_USER: >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct trapframe *locr0 =3D td= ->td_frame; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct sysent *callp; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 unsigned int code; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 int nargs, nsaved; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 register_t args[8]; >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bzero(args, sizeof args); >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* note: PCPU_LAZY_INC() can= only be used if we can >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* afford occassional inaccu= racy in the count. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 PCPU_LAZY_INC(cnt.v_syscall); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (td->td_ucred !=3D p->p_ucr= ed) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 cred_update_th= read(td); >> -#ifdef KSE >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (p->p_flag & P_SA) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 thread_user_en= ter(td); >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* compute next PC after sysca= ll instruction */ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 td->td_pcb->pcb_tpc =3D trapfr= ame->pc; =A0 =A0/* Remember if restart */ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (DELAYBRANCH(trapframe->cau= se)) { =A0 =A0/* Check BD bit */ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 locr0->pc =3D = MipsEmulateBranch(locr0, trapframe->pc, 0, >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 0); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 locr0->pc +=3D= sizeof(int); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 code =3D locr0->v0; >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct syscall_args sa; >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 int error; >> >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 switch (code) { >> -#if defined(__mips_n32) || defined(__mips_n64) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 case SYS___syscall: >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Quads fit= in a single register in >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* new ABIs. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* XXX o64? >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 case SYS_syscall: >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Code is f= irst argument, followed by >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* actual ar= gs. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 code =3D locr0= ->a0; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[0] =3D lo= cr0->a1; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[1] =3D lo= cr0->a2; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[2] =3D lo= cr0->a3; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 nsaved =3D 3; >> -#if defined(__mips_n32) || defined(__mips_n64) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[3] =3D lo= cr0->t4; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[4] =3D lo= cr0->t5; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[5] =3D lo= cr0->t6; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[6] =3D lo= cr0->t7; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 nsaved +=3D 4; >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 break; >> - >> -#if defined(__mips_o32) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 case SYS___syscall: >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Like sysc= all, but code is a quad, so as >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* to mainta= in quad alignment for the rest >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* of the ar= guments. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (_QUAD_LOWW= ORD =3D=3D 0) { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 code =3D locr0->a0; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 code =3D locr0->a1; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[0] =3D lo= cr0->a2; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[1] =3D lo= cr0->a3; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 nsaved =3D 2; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 break; >> -#endif >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 default: >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[0] =3D lo= cr0->a0; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[1] =3D lo= cr0->a1; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[2] =3D lo= cr0->a2; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[3] =3D lo= cr0->a3; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 nsaved =3D 4; >> -#if defined (__mips_n32) || defined(__mips_n64) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[4] =3D lo= cr0->t4; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[5] =3D lo= cr0->t5; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[6] =3D lo= cr0->t6; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 args[7] =3D lo= cr0->t7; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 nsaved +=3D 4; >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> -#ifdef TRAP_DEBUG >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (trap_debug) { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 printf("SYSCAL= L #%d pid:%u\n", code, p->p_pid); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> -#endif >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (p->p_sysent->sv_mask) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 code &=3D p->p= _sysent->sv_mask; >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (code >=3D p->p_sysent->sv_= size) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 callp =3D &p->= p_sysent->sv_table[0]; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 else >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 callp =3D &p->= p_sysent->sv_table[code]; >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 nargs =3D callp->sy_narg; >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (nargs > nsaved) { >> -#if defined(__mips_n32) || defined(__mips_n64) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* XXX >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Is this r= ight for new ABIs? =A0I think the 4 there >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* should be= 8, size there are 8 registers to skip, >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* not 4, bu= t I'm not certain. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 printf("SYSCAL= L #%u pid:%u, nargs > nsaved.\n", code, p->p_pid); >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 i =3D copyin((= caddr_t)(intptr_t)(locr0->sp + >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 4 * si= zeof(register_t)), (caddr_t)&args[nsaved], >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (u_int= )(nargs - nsaved) * sizeof(register_t)); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (i) { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 locr0->v0 =3D i; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 locr0->a3 =3D 1; >> -#ifdef KTRACE >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 if (KTRPOINT(td, KTR_SYSCALL)) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 =A0 ktrsyscall(code, nargs, args); >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 goto done; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> -#ifdef TRAP_DEBUG >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (trap_debug) { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 for (i =3D 0; = i < nargs; i++) { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 printf("args[%d] =3D %#jx\n", i, (intmax_t)args[i]); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> -#endif >> -#ifdef SYSCALL_TRACING >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 printf("%s(", syscallnames[cod= e]); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 for (i =3D 0; i < nargs; i++) = { >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 printf("%s%#jx= ", i =3D=3D 0 ? "" : ", ", (intmax_t)args[i]); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 printf(")\n"); >> -#endif >> -#ifdef KTRACE >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (KTRPOINT(td, KTR_SYSCALL)) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ktrsyscall(cod= e, nargs, args); >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 td->td_retval[0] =3D 0; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 td->td_retval[1] =3D locr0->v1= ; >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 sa.trapframe =3D trapframe; >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 error =3D syscallenter(td, &sa= ); >> >> =A0#if !defined(SMP) && (defined(DDB) || defined(DEBUG)) >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (trp =3D=3D trapdebug) >> @@ -683,21 +666,7 @@ dofault: >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 else >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 trp[-1].code= =3D code; >> =A0#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 STOPEVENT(p, S_SCE, nargs); >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 PTRACESTOP_SC(p, td, S_PT_SCE)= ; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 i =3D (*callp->sy_call) (td, a= rgs); >> -#if 0 >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Reinitialize proc pointer= `p' as it may be >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* different if this is a ch= ild returning from fork >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* syscall. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 td =3D curthread; >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 locr0 =3D td->td_frame; >> -#endif >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 trapdebug_enter(locr0, -code= ); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 cpu_set_syscall_retval(td, i); >> >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* The sync'ing of I & D c= aches for SYS_ptrace() is >> @@ -705,38 +674,7 @@ dofault: >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* instead of being done h= ere under a special check >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* for SYS_ptrace(). >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 done: >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Check for misbehavior. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 WITNESS_WARN(WARN_PANIC, NULL,= "System call %s returning", >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (code >=3D 0 && code <= SYS_MAXSYSCALL) ? >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 syscallnames[code] : "= ???"); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 KASSERT(td->td_critnest =3D=3D= 0, >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ("System call %s retur= ning in a critical section", >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (code >=3D 0 && code <= SYS_MAXSYSCALL) ? >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 syscallnames[code] : "= ???")); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 KASSERT(td->td_locks =3D=3D 0, >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ("System call %s retur= ning with %d locks held", >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (code >=3D 0 && code <= SYS_MAXSYSCALL) ? >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 syscallnames[code] : "= ???", >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 td->td_locks)); >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 userret(td, trapframe); >> -#ifdef KTRACE >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (KTRPOINT(td, KTR_SYSRET)) >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ktrsysret(code= , i, td->td_retval[0]); >> -#endif >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* This works because errno = is findable through the >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* register set. =A0If we ev= er support an emulation >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* where this is not the cas= e, this code will need >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* to be revisited. >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/ >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 STOPEVENT(p, S_SCX, code); >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 PTRACESTOP_SC(p, td, S_PT_SCX)= ; >> - >> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 mtx_assert(&Giant, MA_NOTOWNED= ); >> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 syscallret(td, error, &sa); >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return (trapframe->pc); >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 } This gives me a crash when I test it on XLR (32bit compile). The crash does not look obvious - I am looking at it, hope to resolve this soon. JC. From owner-freebsd-mips@FreeBSD.ORG Wed Oct 5 12:26:11 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D1C011065673 for ; Wed, 5 Oct 2011 12:26:11 +0000 (UTC) (envelope-from c.jayachandran@gmail.com) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx1.freebsd.org (Postfix) with ESMTP id 617B98FC1A for ; Wed, 5 Oct 2011 12:26:10 +0000 (UTC) Received: by wwe3 with SMTP id 3so2289804wwe.31 for ; Wed, 05 Oct 2011 05:26:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=mKJ84q0ap8Xx0kxD7LodKo2z8ioUXr0ymdo0fyVQiLA=; b=tdJwBHyMW3qDPHIpojgkatxhJCd0i/ZFrxAQBZkAjZUPl5BH36FNRClWoXihIKDiAi Tk7106CoLz9IehS582C94XW7wriV205I0u8d9H0QOsJcGO2qEQT9mO0PFSDlXpKxkfLC gi3ZW6MPa+q6GyFpYO78wbIIlNP0E104nIPAw= MIME-Version: 1.0 Received: by 10.216.137.36 with SMTP id x36mr3047385wei.41.1317817570162; Wed, 05 Oct 2011 05:26:10 -0700 (PDT) Received: by 10.216.29.78 with HTTP; Wed, 5 Oct 2011 05:26:10 -0700 (PDT) In-Reply-To: References: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> <20111004215218.GY1511@deviant.kiev.zoral.com.ua> Date: Wed, 5 Oct 2011 17:56:10 +0530 Message-ID: From: "Jayachandran C." To: Kostik Belousov Content-Type: multipart/mixed; boundary=0016e6de181e25f75804ae8c506c Cc: mips@freebsd.org Subject: Re: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2011 12:26:12 -0000 --0016e6de181e25f75804ae8c506c Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On Wed, Oct 5, 2011 at 5:05 PM, Jayachandran C. wrote: > On Wed, Oct 5, 2011 at 3:22 AM, Kostik Belousov wro= te: >> On Wed, Oct 05, 2011 at 12:11:44AM +0300, Kostik Belousov wrote: >>> Hi, >>> below is the patch, test-compiled for XLP64 only, which converts the >>> only remaining architecture MIPS to the new syscall entry sequence. >>> The advantage of the conversion is sharing most of the code with all >>> other architectures and avoiding duplication. Also, the implementation >>> automatically feels the missed features for the MIPS, see the BUGS >> s/feels/fills/, sorry >>> section in the ptrace(2). >> For the same reason, capsicum shall not work on MIPS. >> >>> >>> I am asking for you help to debug and test the patch. Please keep me >>> on Cc:, I am not on the list. >>> >>> Thank you. >>> >>> diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h >>> index 11a1f8e..4c0b0b6 100644 [...] > > This gives me a crash when I test it on XLR (32bit compile). =A0The > crash does not look obvious - I am looking at it, hope to resolve this > soon. Actually it is fairly obvious :) the elf*_machdep.c has to be updated for using the cpu_fetch_syscall_args. With that change it comes up on 32 bit - will do a few more tests on 64 bit to see how that goes. The other minor issue I saw was the locr0 usage in trap(), in call to trapdebug_enter, it is fine now since TRAP_DEBUG is not defined. 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tinderbox 2.8 running on freebsd-current.sentex.ca TB --- 2011-10-05 12:02:47 - starting HEAD tinderbox run for mips/mips TB --- 2011-10-05 12:02:47 - cleaning the object tree TB --- 2011-10-05 12:02:56 - cvsupping the source tree TB --- 2011-10-05 12:02:56 - /usr/bin/csup -z -r 3 -g -L 1 -h cvsup.sentex.ca /tinderbox/HEAD/mips/mips/supfile TB --- 2011-10-05 12:03:10 - building world TB --- 2011-10-05 12:03:10 - CROSS_BUILD_TESTING=YES TB --- 2011-10-05 12:03:10 - MAKEOBJDIRPREFIX=/obj TB --- 2011-10-05 12:03:10 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2011-10-05 12:03:10 - SRCCONF=/dev/null TB --- 2011-10-05 12:03:10 - TARGET=mips TB --- 2011-10-05 12:03:10 - TARGET_ARCH=mips TB --- 2011-10-05 12:03:10 - TZ=UTC TB --- 2011-10-05 12:03:10 - __MAKE_CONF=/dev/null TB --- 2011-10-05 12:03:10 - cd /src TB --- 2011-10-05 12:03:10 - /usr/bin/make -B buildworld >>> World build started on Wed Oct 5 12:03:10 UTC 2011 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/util.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/fastmatch.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/hashtable.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-compile.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-fastmatch.c cc1: warnings being treated as errors /src/usr.bin/grep/regex/tre-fastmatch.c: In function 'tre_match_fast': /src/usr.bin/grep/regex/tre-fastmatch.c:961: warning: comparison of unsigned expression < 0 is always false *** Error code 1 Stop in /src/usr.bin/grep. *** Error code 1 Stop in /src/usr.bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2011-10-05 12:55:28 - WARNING: /usr/bin/make returned exit code 1 TB --- 2011-10-05 12:55:28 - ERROR: failed to build world TB --- 2011-10-05 12:55:28 - 2247.75 user 616.84 system 3160.99 real http://tinderbox.freebsd.org/tinderbox-head-HEAD-mips-mips.full From owner-freebsd-mips@FreeBSD.ORG Wed Oct 5 14:46:12 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A1AA61065676 for ; Wed, 5 Oct 2011 14:46:12 +0000 (UTC) (envelope-from kostikbel@gmail.com) Received: from mail.zoral.com.ua (mx0.zoral.com.ua [91.193.166.200]) by mx1.freebsd.org (Postfix) with ESMTP id 5EA4A8FC1D for ; Wed, 5 Oct 2011 14:46:10 +0000 (UTC) Received: from alf.home (alf.kiev.zoral.com.ua [10.1.1.177]) by mail.zoral.com.ua (8.14.2/8.14.2) with ESMTP id p95Ek5iM098755 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 5 Oct 2011 17:46:05 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: from alf.home (kostik@localhost [127.0.0.1]) by alf.home (8.14.5/8.14.5) with ESMTP id p95Ek5UI093275; Wed, 5 Oct 2011 17:46:05 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: (from kostik@localhost) by alf.home (8.14.5/8.14.5/Submit) id p95Ek5Lf093274; Wed, 5 Oct 2011 17:46:05 +0300 (EEST) (envelope-from kostikbel@gmail.com) X-Authentication-Warning: alf.home: kostik set sender to kostikbel@gmail.com using -f Date: Wed, 5 Oct 2011 17:46:05 +0300 From: Kostik Belousov To: "Jayachandran C." Message-ID: <20111005144605.GC1511@deviant.kiev.zoral.com.ua> References: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> <20111004215218.GY1511@deviant.kiev.zoral.com.ua> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="fmrJ4y+ZXhodCOcq" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-Virus-Scanned: clamav-milter 0.95.2 at skuns.kiev.zoral.com.ua X-Virus-Status: Clean X-Spam-Status: No, score=-3.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00, DNS_FROM_OPENWHOIS autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on skuns.kiev.zoral.com.ua Cc: mips@freebsd.org Subject: Re: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2011 14:46:12 -0000 --fmrJ4y+ZXhodCOcq Content-Type: text/plain; charset=koi8-r Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Oct 05, 2011 at 05:56:10PM +0530, Jayachandran C. wrote: > On Wed, Oct 5, 2011 at 5:05 PM, Jayachandran C. > wrote: > > On Wed, Oct 5, 2011 at 3:22 AM, Kostik Belousov w= rote: > >> On Wed, Oct 05, 2011 at 12:11:44AM +0300, Kostik Belousov wrote: > >>> Hi, > >>> below is the patch, test-compiled for XLP64 only, which converts the > >>> only remaining architecture MIPS to the new syscall entry sequence. > >>> The advantage of the conversion is sharing most of the code with all > >>> other architectures and avoiding duplication. Also, the implementation > >>> automatically feels the missed features for the MIPS, see the BUGS > >> s/feels/fills/, sorry > >>> section in the ptrace(2). > >> For the same reason, capsicum shall not work on MIPS. > >> > >>> > >>> I am asking for you help to debug and test the patch. Please keep me > >>> on Cc:, I am not on the list. > >>> > >>> Thank you. > >>> > >>> diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h > >>> index 11a1f8e..4c0b0b6 100644 > [...] > > > > This gives me a crash when I test it on XLR (32bit compile). =9AThe > > crash does not look obvious - I am looking at it, hope to resolve this > > soon. >=20 > Actually it is fairly obvious :) the elf*_machdep.c has to be updated > for using the cpu_fetch_syscall_args. With that change it comes up on > 32 bit - will do a few more tests on 64 bit to see how that goes. >=20 > The other minor issue I saw was the locr0 usage in trap(), in call to > trapdebug_enter, it is fine now since TRAP_DEBUG is not defined. Thank you very much. Your fix is applied, and I tried to cover both locr0 and code usage. Will wait for your testing. diff --git a/lib/libc/sys/ptrace.2 b/lib/libc/sys/ptrace.2 index e7eb7d6..4359228 100644 --- a/lib/libc/sys/ptrace.2 +++ b/lib/libc/sys/ptrace.2 @@ -2,7 +2,7 @@ .\" $NetBSD: ptrace.2,v 1.2 1995/02/27 12:35:37 cgd Exp $ .\" .\" This file is in the public domain. -.Dd October 3, 2011 +.Dd October 5, 2011 .Dt PTRACE 2 .Os .Sh NAME @@ -599,11 +599,3 @@ The .Fn ptrace function appeared in .At v7 . -.Sh BUGS -The -.Dv PL_FLAG_FORKED , -.Dv PL_FLAG_SCE , -.Dv PL_FLAG_SCX -and -.Dv PL_FLAG_EXEC -are not implemented for MIPS architecture. diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h index 11a1f8e..4c0b0b6 100644 --- a/sys/mips/include/proc.h +++ b/sys/mips/include/proc.h @@ -67,11 +67,22 @@ struct mdproc { /* empty */ }; =20 +#ifdef _KERNEL struct thread; =20 void mips_cpu_switch(struct thread *, struct thread *, struct mtx *); void mips_cpu_throw(struct thread *, struct thread *); =20 +struct syscall_args { + u_int code; + struct sysent *callp; + register_t args[8]; + int narg; + struct trapframe *trapframe; +}; +#define HAVE_SYSCALL_ARGS_DEF 1 +#endif + #ifdef __mips_n64 #define KINFO_PROC_SIZE 1088 #else diff --git a/sys/mips/mips/elf64_machdep.c b/sys/mips/mips/elf64_machdep.c index 9fa31fa..ee25ef4 100644 --- a/sys/mips/mips/elf64_machdep.c +++ b/sys/mips/mips/elf64_machdep.c @@ -80,8 +80,8 @@ struct sysentvec elf64_freebsd_sysvec =3D { .sv_maxssiz =3D NULL, .sv_flags =3D SV_ABI_FREEBSD | SV_LP64, .sv_set_syscall_retval =3D cpu_set_syscall_retval, - .sv_fetch_syscall_args =3D NULL, /* XXXKIB */ - .sv_syscallnames =3D NULL, + .sv_fetch_syscall_args =3D cpu_fetch_syscall_args, + .sv_syscallnames =3D syscallnames, .sv_schedtail =3D NULL, }; =20 diff --git a/sys/mips/mips/elf_machdep.c b/sys/mips/mips/elf_machdep.c index 41611e3..85ada0b 100644 --- a/sys/mips/mips/elf_machdep.c +++ b/sys/mips/mips/elf_machdep.c @@ -80,7 +80,7 @@ struct sysentvec elf64_freebsd_sysvec =3D { .sv_maxssiz =3D NULL, .sv_flags =3D SV_ABI_FREEBSD | SV_LP64, .sv_set_syscall_retval =3D cpu_set_syscall_retval, - .sv_fetch_syscall_args =3D NULL, /* XXXKIB */ + .sv_fetch_syscall_args =3D cpu_fetch_syscall_args, .sv_syscallnames =3D syscallnames, .sv_schedtail =3D NULL, }; @@ -136,7 +136,7 @@ struct sysentvec elf32_freebsd_sysvec =3D { .sv_maxssiz =3D NULL, .sv_flags =3D SV_ABI_FREEBSD | SV_ILP32, .sv_set_syscall_retval =3D cpu_set_syscall_retval, - .sv_fetch_syscall_args =3D NULL, /* XXXKIB */ + .sv_fetch_syscall_args =3D cpu_fetch_syscall_args, .sv_syscallnames =3D syscallnames, .sv_schedtail =3D NULL, }; diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c index c800e71..97374a7 100644 --- a/sys/mips/mips/trap.c +++ b/sys/mips/mips/trap.c @@ -261,6 +261,133 @@ static int emulate_unaligned_access(struct trapframe = *frame, int mode); =20 extern void fswintrberr(void); /* XXX */ =20 +int +cpu_fetch_syscall_args(struct thread *td, struct syscall_args *sa) +{ + struct trapframe *locr0 =3D td->td_frame; + struct sysentvec *se; + int error, nsaved; + + bzero(sa->args, sizeof(sa->args)); + + /* compute next PC after syscall instruction */ + td->td_pcb->pcb_tpc =3D sa->trapframe->pc; /* Remember if restart */ + if (DELAYBRANCH(sa->trapframe->cause)) /* Check BD bit */ + locr0->pc =3D MipsEmulateBranch(locr0, sa->trapframe->pc, 0, 0); + else + locr0->pc +=3D sizeof(int); + sa->code =3D locr0->v0; + + switch (sa->code) { +#if defined(__mips_n32) || defined(__mips_n64) + case SYS___syscall: + /* + * Quads fit in a single register in + * new ABIs. + * + * XXX o64? + */ +#endif + case SYS_syscall: + /* + * Code is first argument, followed by + * actual args. + */ + sa->code =3D locr0->a0; + sa->args[0] =3D locr0->a1; + sa->args[1] =3D locr0->a2; + sa->args[2] =3D locr0->a3; + nsaved =3D 3; +#if defined(__mips_n32) || defined(__mips_n64) + sa->args[3] =3D locr0->t4; + sa->args[4] =3D locr0->t5; + sa->args[5] =3D locr0->t6; + sa->args[6] =3D locr0->t7; + nsaved +=3D 4; +#endif + break; + +#if defined(__mips_o32) + case SYS___syscall: + /* + * Like syscall, but code is a quad, so as + * to maintain quad alignment for the rest + * of the arguments. + */ + if (_QUAD_LOWWORD =3D=3D 0) + sa->code =3D locr0->a0; + else + sa->code =3D locr0->a1; + sa->args[0] =3D locr0->a2; + sa->args[1] =3D locr0->a3; + nsaved =3D 2; + break; +#endif + + default: + sa->args[0] =3D locr0->a0; + sa->args[1] =3D locr0->a1; + sa->args[2] =3D locr0->a2; + sa->args[3] =3D locr0->a3; + nsaved =3D 4; +#if defined (__mips_n32) || defined(__mips_n64) + sa->args[4] =3D locr0->t4; + sa->args[5] =3D locr0->t5; + sa->args[6] =3D locr0->t6; + sa->args[7] =3D locr0->t7; + nsaved +=3D 4; +#endif + break; + } +#ifdef TRAP_DEBUG + if (trap_debug) + printf("SYSCALL #%d pid:%u\n", code, p->p_pid); +#endif + + se =3D td->td_proc->p_sysent; + if (se->sv_mask) + sa->code &=3D se->sv_mask; + + if (sa->code >=3D se->sv_size) + sa->callp =3D &se->sv_table[0]; + else + sa->callp =3D &se->sv_table[sa->code]; + + sa->narg =3D sa->callp->sy_narg; + + if (sa->narg > nsaved) { +#if defined(__mips_n32) || defined(__mips_n64) + /* + * XXX + * Is this right for new ABIs? I think the 4 there + * should be 8, size there are 8 registers to skip, + * not 4, but I'm not certain. + */ + printf("SYSCALL #%u pid:%u, nargs > nsaved.\n", sa->code, + td->td_proc->p_pid); +#endif + error =3D copyin((caddr_t)(intptr_t)(locr0->sp + + 4 * sizeof(register_t)), (caddr_t)&sa->args[nsaved], + (u_int)(sa->narg - nsaved) * sizeof(register_t)); + if (error !=3D 0) { + locr0->v0 =3D error; + locr0->a3 =3D 1; + } + } else + error =3D 0; + + if (error =3D=3D 0) { + td->td_retval[0] =3D 0; + td->td_retval[1] =3D locr0->v1; + } + + return (error); +} + +#undef __FBSDID +#define __FBSDID(x) +#include "../../kern/subr_syscall.c" + /* * Handle an exception. * Called from MipsKernGenException() or MipsUserGenException() @@ -527,177 +654,19 @@ dofault: =20 case T_SYSCALL + T_USER: { - struct trapframe *locr0 =3D td->td_frame; - struct sysent *callp; - unsigned int code; - int nargs, nsaved; - register_t args[8]; - - bzero(args, sizeof args); - - /* - * note: PCPU_LAZY_INC() can only be used if we can - * afford occassional inaccuracy in the count. - */ - PCPU_LAZY_INC(cnt.v_syscall); - if (td->td_ucred !=3D p->p_ucred) - cred_update_thread(td); -#ifdef KSE - if (p->p_flag & P_SA) - thread_user_enter(td); -#endif - /* compute next PC after syscall instruction */ - td->td_pcb->pcb_tpc =3D trapframe->pc; /* Remember if restart */ - if (DELAYBRANCH(trapframe->cause)) { /* Check BD bit */ - locr0->pc =3D MipsEmulateBranch(locr0, trapframe->pc, 0, - 0); - } else { - locr0->pc +=3D sizeof(int); - } - code =3D locr0->v0; + struct syscall_args sa; + int error; =20 - switch (code) { -#if defined(__mips_n32) || defined(__mips_n64) - case SYS___syscall: - /* - * Quads fit in a single register in - * new ABIs. - * - * XXX o64? - */ -#endif - case SYS_syscall: - /* - * Code is first argument, followed by - * actual args. - */ - code =3D locr0->a0; - args[0] =3D locr0->a1; - args[1] =3D locr0->a2; - args[2] =3D locr0->a3; - nsaved =3D 3; -#if defined(__mips_n32) || defined(__mips_n64) - args[3] =3D locr0->t4; - args[4] =3D locr0->t5; - args[5] =3D locr0->t6; - args[6] =3D locr0->t7; - nsaved +=3D 4; -#endif - break; - -#if defined(__mips_o32) - case SYS___syscall: - /* - * Like syscall, but code is a quad, so as - * to maintain quad alignment for the rest - * of the arguments. - */ - if (_QUAD_LOWWORD =3D=3D 0) { - code =3D locr0->a0; - } else { - code =3D locr0->a1; - } - args[0] =3D locr0->a2; - args[1] =3D locr0->a3; - nsaved =3D 2; - break; -#endif - - default: - args[0] =3D locr0->a0; - args[1] =3D locr0->a1; - args[2] =3D locr0->a2; - args[3] =3D locr0->a3; - nsaved =3D 4; -#if defined (__mips_n32) || defined(__mips_n64) - args[4] =3D locr0->t4; - args[5] =3D locr0->t5; - args[6] =3D locr0->t6; - args[7] =3D locr0->t7; - nsaved +=3D 4; -#endif - } -#ifdef TRAP_DEBUG - if (trap_debug) { - printf("SYSCALL #%d pid:%u\n", code, p->p_pid); - } -#endif - - if (p->p_sysent->sv_mask) - code &=3D p->p_sysent->sv_mask; - - if (code >=3D p->p_sysent->sv_size) - callp =3D &p->p_sysent->sv_table[0]; - else - callp =3D &p->p_sysent->sv_table[code]; - - nargs =3D callp->sy_narg; - - if (nargs > nsaved) { -#if defined(__mips_n32) || defined(__mips_n64) - /* - * XXX - * Is this right for new ABIs? I think the 4 there - * should be 8, size there are 8 registers to skip, - * not 4, but I'm not certain. - */ - printf("SYSCALL #%u pid:%u, nargs > nsaved.\n", code, p->p_pid); -#endif - i =3D copyin((caddr_t)(intptr_t)(locr0->sp + - 4 * sizeof(register_t)), (caddr_t)&args[nsaved], - (u_int)(nargs - nsaved) * sizeof(register_t)); - if (i) { - locr0->v0 =3D i; - locr0->a3 =3D 1; -#ifdef KTRACE - if (KTRPOINT(td, KTR_SYSCALL)) - ktrsyscall(code, nargs, args); -#endif - goto done; - } - } -#ifdef TRAP_DEBUG - if (trap_debug) { - for (i =3D 0; i < nargs; i++) { - printf("args[%d] =3D %#jx\n", i, (intmax_t)args[i]); - } - } -#endif -#ifdef SYSCALL_TRACING - printf("%s(", syscallnames[code]); - for (i =3D 0; i < nargs; i++) { - printf("%s%#jx", i =3D=3D 0 ? "" : ", ", (intmax_t)args[i]); - } - printf(")\n"); -#endif -#ifdef KTRACE - if (KTRPOINT(td, KTR_SYSCALL)) - ktrsyscall(code, nargs, args); -#endif - td->td_retval[0] =3D 0; - td->td_retval[1] =3D locr0->v1; + sa.trapframe =3D trapframe; + error =3D syscallenter(td, &sa); =20 #if !defined(SMP) && (defined(DDB) || defined(DEBUG)) if (trp =3D=3D trapdebug) - trapdebug[TRAPSIZE - 1].code =3D code; + trapdebug[TRAPSIZE - 1].code =3D sa.code; else - trp[-1].code =3D code; + trp[-1].code =3D sa.code; #endif - STOPEVENT(p, S_SCE, nargs); - - PTRACESTOP_SC(p, td, S_PT_SCE); - i =3D (*callp->sy_call) (td, args); -#if 0 - /* - * Reinitialize proc pointer `p' as it may be - * different if this is a child returning from fork - * syscall. - */ - td =3D curthread; - locr0 =3D td->td_frame; -#endif - trapdebug_enter(locr0, -code); - cpu_set_syscall_retval(td, i); + trapdebug_enter(td->td_frame, -sa.code); =20 /* * The sync'ing of I & D caches for SYS_ptrace() is @@ -705,38 +674,7 @@ dofault: * instead of being done here under a special check * for SYS_ptrace(). */ - done: - /* - * Check for misbehavior. - */ - WITNESS_WARN(WARN_PANIC, NULL, "System call %s returning", - (code >=3D 0 && code < SYS_MAXSYSCALL) ? - syscallnames[code] : "???"); - KASSERT(td->td_critnest =3D=3D 0, - ("System call %s returning in a critical section", - (code >=3D 0 && code < SYS_MAXSYSCALL) ? - syscallnames[code] : "???")); - KASSERT(td->td_locks =3D=3D 0, - ("System call %s returning with %d locks held", - (code >=3D 0 && code < SYS_MAXSYSCALL) ? - syscallnames[code] : "???", - td->td_locks)); - userret(td, trapframe); -#ifdef KTRACE - if (KTRPOINT(td, KTR_SYSRET)) - ktrsysret(code, i, td->td_retval[0]); -#endif - /* - * This works because errno is findable through the - * register set. If we ever support an emulation - * where this is not the case, this code will need - * to be revisited. - */ - STOPEVENT(p, S_SCX, code); - - PTRACESTOP_SC(p, td, S_PT_SCX); - - mtx_assert(&Giant, MA_NOTOWNED); + syscallret(td, error, &sa); return (trapframe->pc); } =20 --fmrJ4y+ZXhodCOcq Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.18 (FreeBSD) iEYEARECAAYFAk6Mba0ACgkQC3+MBN1Mb4hNYACeLumBGWiQk5/k7pJnWJCLgigF 59kAoIsKXNJXc9l7l2zDzjv9EwInF6ip =LX+r -----END PGP SIGNATURE----- --fmrJ4y+ZXhodCOcq-- From owner-freebsd-mips@FreeBSD.ORG Wed Oct 5 17:20:31 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 00C4C1065675 for ; Wed, 5 Oct 2011 17:20:31 +0000 (UTC) (envelope-from c.jayachandran@gmail.com) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx1.freebsd.org (Postfix) with ESMTP id 8D1998FC1B for ; Wed, 5 Oct 2011 17:20:30 +0000 (UTC) Received: by wwe3 with SMTP id 3so2753666wwe.31 for ; Wed, 05 Oct 2011 10:20:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=ziO2Jy8OqxdWk16nUNhIscS1L7h6krfKdonoM8vshZM=; b=MK6zGrDRe9ImzWmf3aqVnNV2Aq85L8GIxoEpfk+d3O4ERg/p2XArZ9hUm/IdPUIOh6 2z2dFNJ3n05OfmQgo+d86FCHR/CWezQb6iiNyUWinVadSl9j5w1Ze9HjgFK3KMCKmYY6 6HbkbP20pHkjHBpUuBkRRPf+l1Jbi7tSAXbQs= MIME-Version: 1.0 Received: by 10.216.138.210 with SMTP id a60mr6071554wej.41.1317835229198; Wed, 05 Oct 2011 10:20:29 -0700 (PDT) Received: by 10.216.29.78 with HTTP; Wed, 5 Oct 2011 10:20:29 -0700 (PDT) In-Reply-To: <20111005144605.GC1511@deviant.kiev.zoral.com.ua> References: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> <20111004215218.GY1511@deviant.kiev.zoral.com.ua> <20111005144605.GC1511@deviant.kiev.zoral.com.ua> Date: Wed, 5 Oct 2011 22:50:29 +0530 Message-ID: From: "Jayachandran C." To: Kostik Belousov Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: mips@freebsd.org Subject: Re: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2011 17:20:31 -0000 2011/10/5 Kostik Belousov : > On Wed, Oct 05, 2011 at 05:56:10PM +0530, Jayachandran C. wrote: >> On Wed, Oct 5, 2011 at 5:05 PM, Jayachandran C. >> wrote: >> > On Wed, Oct 5, 2011 at 3:22 AM, Kostik Belousov = wrote: >> >> On Wed, Oct 05, 2011 at 12:11:44AM +0300, Kostik Belousov wrote: >> >>> Hi, >> >>> below is the patch, test-compiled for XLP64 only, which converts the >> >>> only remaining architecture MIPS to the new syscall entry sequence. >> >>> The advantage of the conversion is sharing most of the code with all >> >>> other architectures and avoiding duplication. Also, the implementati= on >> >>> automatically feels the missed features for the MIPS, see the BUGS >> >> s/feels/fills/, sorry >> >>> section in the ptrace(2). >> >> For the same reason, capsicum shall not work on MIPS. >> >> >> >>> >> >>> I am asking for you help to debug and test the patch. Please keep me >> >>> on Cc:, I am not on the list. >> >>> >> >>> Thank you. >> >>> >> >>> diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h >> >>> index 11a1f8e..4c0b0b6 100644 >> [...] >> > >> > This gives me a crash when I test it on XLR (32bit compile). =A0The >> > crash does not look obvious - I am looking at it, hope to resolve this >> > soon. >> >> Actually it is fairly obvious :) =A0the elf*_machdep.c has to be updated >> for using the cpu_fetch_syscall_args. With that change it comes up on >> 32 bit - will do a few more tests on 64 bit to see how that goes. >> >> The other minor issue I saw was the locr0 usage in trap(), in call to >> trapdebug_enter, =A0it is fine now since =A0TRAP_DEBUG is not defined. > > Thank you very much. Your fix is applied, and I tried to cover both > locr0 and code usage. > > Will wait for your testing. This works for me, tried on o32/n32/n64 on XLR. Thanks for fixing this up . JC. From owner-freebsd-mips@FreeBSD.ORG Wed Oct 5 18:21:46 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 07D491065673 for ; Wed, 5 Oct 2011 18:21:46 +0000 (UTC) (envelope-from kostikbel@gmail.com) Received: from mail.zoral.com.ua (mx0.zoral.com.ua [91.193.166.200]) by mx1.freebsd.org (Postfix) with ESMTP id 5E2E58FC16 for ; Wed, 5 Oct 2011 18:21:44 +0000 (UTC) Received: from alf.home (alf.kiev.zoral.com.ua [10.1.1.177]) by mail.zoral.com.ua (8.14.2/8.14.2) with ESMTP id p95ILecW080865 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 5 Oct 2011 21:21:40 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: from alf.home (kostik@localhost [127.0.0.1]) by alf.home (8.14.5/8.14.5) with ESMTP id p95ILdOr094615; Wed, 5 Oct 2011 21:21:39 +0300 (EEST) (envelope-from kostikbel@gmail.com) Received: (from kostik@localhost) by alf.home (8.14.5/8.14.5/Submit) id p95ILdmV094614; Wed, 5 Oct 2011 21:21:39 +0300 (EEST) (envelope-from kostikbel@gmail.com) X-Authentication-Warning: alf.home: kostik set sender to kostikbel@gmail.com using -f Date: Wed, 5 Oct 2011 21:21:39 +0300 From: Kostik Belousov To: "Jayachandran C." Message-ID: <20111005182139.GG1511@deviant.kiev.zoral.com.ua> References: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> <20111004215218.GY1511@deviant.kiev.zoral.com.ua> <20111005144605.GC1511@deviant.kiev.zoral.com.ua> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="86Kqgbv7jwc0ijsN" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-Virus-Scanned: clamav-milter 0.95.2 at skuns.kiev.zoral.com.ua X-Virus-Status: Clean X-Spam-Status: No, score=-3.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00, DNS_FROM_OPENWHOIS autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on skuns.kiev.zoral.com.ua Cc: mips@freebsd.org Subject: Re: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2011 18:21:46 -0000 --86Kqgbv7jwc0ijsN Content-Type: text/plain; charset=koi8-r Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Oct 05, 2011 at 10:50:29PM +0530, Jayachandran C. wrote: > 2011/10/5 Kostik Belousov : > > On Wed, Oct 05, 2011 at 05:56:10PM +0530, Jayachandran C. wrote: > >> On Wed, Oct 5, 2011 at 5:05 PM, Jayachandran C. > >> wrote: > >> > On Wed, Oct 5, 2011 at 3:22 AM, Kostik Belousov wrote: > >> >> On Wed, Oct 05, 2011 at 12:11:44AM +0300, Kostik Belousov wrote: > >> >>> Hi, > >> >>> below is the patch, test-compiled for XLP64 only, which converts t= he > >> >>> only remaining architecture MIPS to the new syscall entry sequence. > >> >>> The advantage of the conversion is sharing most of the code with a= ll > >> >>> other architectures and avoiding duplication. Also, the implementa= tion > >> >>> automatically feels the missed features for the MIPS, see the BUGS > >> >> s/feels/fills/, sorry > >> >>> section in the ptrace(2). > >> >> For the same reason, capsicum shall not work on MIPS. > >> >> > >> >>> > >> >>> I am asking for you help to debug and test the patch. Please keep = me > >> >>> on Cc:, I am not on the list. > >> >>> > >> >>> Thank you. > >> >>> > >> >>> diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h > >> >>> index 11a1f8e..4c0b0b6 100644 > >> [...] > >> > > >> > This gives me a crash when I test it on XLR (32bit compile). =9AThe > >> > crash does not look obvious - I am looking at it, hope to resolve th= is > >> > soon. > >> > >> Actually it is fairly obvious :) =9Athe elf*_machdep.c has to be updat= ed > >> for using the cpu_fetch_syscall_args. With that change it comes up on > >> 32 bit - will do a few more tests on 64 bit to see how that goes. > >> > >> The other minor issue I saw was the locr0 usage in trap(), in call to > >> trapdebug_enter, =9Ait is fine now since =9ATRAP_DEBUG is not defined. > > > > Thank you very much. Your fix is applied, and I tried to cover both > > locr0 and code usage. > > > > Will wait for your testing. >=20 > This works for me, tried on o32/n32/n64 on XLR. Thanks for fixing this up > . > JC. Thank you again. Should I consider this as an approval to commit the patch ? (I will make universe it before committing anyway). --86Kqgbv7jwc0ijsN Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.18 (FreeBSD) iEYEARECAAYFAk6MoDMACgkQC3+MBN1Mb4iF3gCggjZn+OQ3bEHziYRpA6hZXQn8 Bf0AniGhcuh/WqfsArBLoPxM7+vYWsJr =iEEW -----END PGP SIGNATURE----- --86Kqgbv7jwc0ijsN-- From owner-freebsd-mips@FreeBSD.ORG Wed Oct 5 18:50:18 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B188D106564A; Wed, 5 Oct 2011 18:50:18 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-current.sentex.ca (freebsd-current.sentex.ca [64.7.128.98]) by mx1.freebsd.org (Postfix) with ESMTP id 7D7A68FC08; Wed, 5 Oct 2011 18:50:18 +0000 (UTC) Received: from freebsd-current.sentex.ca (localhost [127.0.0.1]) by freebsd-current.sentex.ca (8.14.5/8.14.4) with ESMTP id p95IoHCj034714; Wed, 5 Oct 2011 14:50:17 -0400 (EDT) (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-current.sentex.ca (8.14.5/8.14.4/Submit) id p95IoHxn034702; Wed, 5 Oct 2011 18:50:17 GMT (envelope-from tinderbox@freebsd.org) Date: Wed, 5 Oct 2011 18:50:17 GMT Message-Id: <201110051850.p95IoHxn034702@freebsd-current.sentex.ca> X-Authentication-Warning: freebsd-current.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Precedence: bulk Cc: Subject: [head tinderbox] failure on mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2011 18:50:18 -0000 TB --- 2011-10-05 17:56:38 - tinderbox 2.8 running on freebsd-current.sentex.ca TB --- 2011-10-05 17:56:38 - starting HEAD tinderbox run for mips/mips TB --- 2011-10-05 17:56:38 - cleaning the object tree TB --- 2011-10-05 17:56:46 - cvsupping the source tree TB --- 2011-10-05 17:56:46 - /usr/bin/csup -z -r 3 -g -L 1 -h cvsup.sentex.ca /tinderbox/HEAD/mips/mips/supfile TB --- 2011-10-05 17:57:33 - building world TB --- 2011-10-05 17:57:33 - CROSS_BUILD_TESTING=YES TB --- 2011-10-05 17:57:33 - MAKEOBJDIRPREFIX=/obj TB --- 2011-10-05 17:57:33 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2011-10-05 17:57:33 - SRCCONF=/dev/null TB --- 2011-10-05 17:57:33 - TARGET=mips TB --- 2011-10-05 17:57:33 - TARGET_ARCH=mips TB --- 2011-10-05 17:57:33 - TZ=UTC TB --- 2011-10-05 17:57:33 - __MAKE_CONF=/dev/null TB --- 2011-10-05 17:57:33 - cd /src TB --- 2011-10-05 17:57:33 - /usr/bin/make -B buildworld >>> World build started on Wed Oct 5 17:57:33 UTC 2011 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/util.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/fastmatch.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/hashtable.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-compile.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-fastmatch.c cc1: warnings being treated as errors /src/usr.bin/grep/regex/tre-fastmatch.c: In function 'tre_match_fast': /src/usr.bin/grep/regex/tre-fastmatch.c:961: warning: comparison of unsigned expression < 0 is always false *** Error code 1 Stop in /src/usr.bin/grep. *** Error code 1 Stop in /src/usr.bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2011-10-05 18:50:17 - WARNING: /usr/bin/make returned exit code 1 TB --- 2011-10-05 18:50:17 - ERROR: failed to build world TB --- 2011-10-05 18:50:17 - 2258.70 user 632.52 system 3218.91 real http://tinderbox.freebsd.org/tinderbox-head-HEAD-mips-mips.full From owner-freebsd-mips@FreeBSD.ORG Wed Oct 5 23:38:09 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9C8D0106566C; Wed, 5 Oct 2011 23:38:09 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-current.sentex.ca (freebsd-current.sentex.ca [64.7.128.98]) by mx1.freebsd.org (Postfix) with ESMTP id 6F3298FC0C; Wed, 5 Oct 2011 23:38:09 +0000 (UTC) Received: from freebsd-current.sentex.ca (localhost [127.0.0.1]) by freebsd-current.sentex.ca (8.14.5/8.14.4) with ESMTP id p95Nc8nE073174; Wed, 5 Oct 2011 19:38:08 -0400 (EDT) (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-current.sentex.ca (8.14.5/8.14.4/Submit) id p95Nc8lH073167; Wed, 5 Oct 2011 23:38:08 GMT (envelope-from tinderbox@freebsd.org) Date: Wed, 5 Oct 2011 23:38:08 GMT Message-Id: <201110052338.p95Nc8lH073167@freebsd-current.sentex.ca> X-Authentication-Warning: freebsd-current.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Precedence: bulk Cc: Subject: [head tinderbox] failure on mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2011 23:38:09 -0000 TB --- 2011-10-05 22:46:12 - tinderbox 2.8 running on freebsd-current.sentex.ca TB --- 2011-10-05 22:46:12 - starting HEAD tinderbox run for mips/mips TB --- 2011-10-05 22:46:12 - cleaning the object tree TB --- 2011-10-05 22:46:21 - cvsupping the source tree TB --- 2011-10-05 22:46:21 - /usr/bin/csup -z -r 3 -g -L 1 -h cvsup.sentex.ca /tinderbox/HEAD/mips/mips/supfile TB --- 2011-10-05 22:46:36 - building world TB --- 2011-10-05 22:46:36 - CROSS_BUILD_TESTING=YES TB --- 2011-10-05 22:46:36 - MAKEOBJDIRPREFIX=/obj TB --- 2011-10-05 22:46:36 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2011-10-05 22:46:36 - SRCCONF=/dev/null TB --- 2011-10-05 22:46:36 - TARGET=mips TB --- 2011-10-05 22:46:36 - TARGET_ARCH=mips TB --- 2011-10-05 22:46:36 - TZ=UTC TB --- 2011-10-05 22:46:36 - __MAKE_CONF=/dev/null TB --- 2011-10-05 22:46:36 - cd /src TB --- 2011-10-05 22:46:36 - /usr/bin/make -B buildworld >>> World build started on Wed Oct 5 22:46:36 UTC 2011 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/util.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/fastmatch.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/hashtable.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-compile.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-fastmatch.c cc1: warnings being treated as errors /src/usr.bin/grep/regex/tre-fastmatch.c: In function 'tre_match_fast': /src/usr.bin/grep/regex/tre-fastmatch.c:961: warning: comparison of unsigned expression < 0 is always false *** Error code 1 Stop in /src/usr.bin/grep. *** Error code 1 Stop in /src/usr.bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2011-10-05 23:38:08 - WARNING: /usr/bin/make returned exit code 1 TB --- 2011-10-05 23:38:08 - ERROR: failed to build world TB --- 2011-10-05 23:38:08 - 2205.68 user 625.59 system 3115.77 real http://tinderbox.freebsd.org/tinderbox-head-HEAD-mips-mips.full From owner-freebsd-mips@FreeBSD.ORG Thu Oct 6 04:38:52 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E4BA3106566B; Thu, 6 Oct 2011 04:38:51 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-current.sentex.ca (freebsd-current.sentex.ca [64.7.128.98]) by mx1.freebsd.org (Postfix) with ESMTP id B06CE8FC13; Thu, 6 Oct 2011 04:38:51 +0000 (UTC) Received: from freebsd-current.sentex.ca (localhost [127.0.0.1]) by freebsd-current.sentex.ca (8.14.5/8.14.4) with ESMTP id p964cofo020956; Thu, 6 Oct 2011 00:38:50 -0400 (EDT) (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-current.sentex.ca (8.14.5/8.14.4/Submit) id p964co59020943; Thu, 6 Oct 2011 04:38:50 GMT (envelope-from tinderbox@freebsd.org) Date: Thu, 6 Oct 2011 04:38:50 GMT Message-Id: <201110060438.p964co59020943@freebsd-current.sentex.ca> X-Authentication-Warning: freebsd-current.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Precedence: bulk Cc: Subject: [head tinderbox] failure on mips/mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Oct 2011 04:38:52 -0000 TB --- 2011-10-06 03:45:54 - tinderbox 2.8 running on freebsd-current.sentex.ca TB --- 2011-10-06 03:45:54 - starting HEAD tinderbox run for mips/mips TB --- 2011-10-06 03:45:54 - cleaning the object tree TB --- 2011-10-06 03:46:04 - cvsupping the source tree TB --- 2011-10-06 03:46:04 - /usr/bin/csup -z -r 3 -g -L 1 -h cvsup.sentex.ca /tinderbox/HEAD/mips/mips/supfile TB --- 2011-10-06 03:46:31 - building world TB --- 2011-10-06 03:46:31 - CROSS_BUILD_TESTING=YES TB --- 2011-10-06 03:46:31 - MAKEOBJDIRPREFIX=/obj TB --- 2011-10-06 03:46:31 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2011-10-06 03:46:31 - SRCCONF=/dev/null TB --- 2011-10-06 03:46:31 - TARGET=mips TB --- 2011-10-06 03:46:31 - TARGET_ARCH=mips TB --- 2011-10-06 03:46:31 - TZ=UTC TB --- 2011-10-06 03:46:31 - __MAKE_CONF=/dev/null TB --- 2011-10-06 03:46:31 - cd /src TB --- 2011-10-06 03:46:31 - /usr/bin/make -B buildworld >>> World build started on Thu Oct 6 03:46:32 UTC 2011 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/util.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/fastmatch.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/hashtable.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-compile.c cc -O -pipe -G0 -I/src/usr.bin/grep/regex -I/usr/include/gnu -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/grep/regex/tre-fastmatch.c cc1: warnings being treated as errors /src/usr.bin/grep/regex/tre-fastmatch.c: In function 'tre_match_fast': /src/usr.bin/grep/regex/tre-fastmatch.c:961: warning: comparison of unsigned expression < 0 is always false *** Error code 1 Stop in /src/usr.bin/grep. *** Error code 1 Stop in /src/usr.bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2011-10-06 04:38:50 - WARNING: /usr/bin/make returned exit code 1 TB --- 2011-10-06 04:38:50 - ERROR: failed to build world TB --- 2011-10-06 04:38:50 - 2239.57 user 625.60 system 3176.38 real http://tinderbox.freebsd.org/tinderbox-head-HEAD-mips-mips.full From owner-freebsd-mips@FreeBSD.ORG Thu Oct 6 07:30:16 2011 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C3B5C106564A for ; Thu, 6 Oct 2011 07:30:16 +0000 (UTC) (envelope-from c.jayachandran@gmail.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 53FB48FC13 for ; Thu, 6 Oct 2011 07:30:15 +0000 (UTC) Received: by wyj26 with SMTP id 26so3404215wyj.13 for ; Thu, 06 Oct 2011 00:30:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=NSxfdYM2zHJqST6YU1oKQnyIZHgyy6RO3wH0Kg4abQs=; b=i7D5qJNlNqvVmhO5pGiXd7BTQWMetQ27sXMFB2w9LZ9FBHh60MKOxAORnpUiZDn4HL v8bUASSUzeLM+n2d6LaYx3YYzzk8E9m+BOCq86fcMYS1eiv29jE9KOjpLem8S8x1n3Y5 rUcfd8DDpuaK+i9YLsbH/DXKBdxtEu4uKg9LM= MIME-Version: 1.0 Received: by 10.216.138.82 with SMTP id z60mr735419wei.11.1317886215164; Thu, 06 Oct 2011 00:30:15 -0700 (PDT) Received: by 10.216.29.78 with HTTP; Thu, 6 Oct 2011 00:30:15 -0700 (PDT) In-Reply-To: <20111005182139.GG1511@deviant.kiev.zoral.com.ua> References: <20111004211144.GW1511@deviant.kiev.zoral.com.ua> <20111004215218.GY1511@deviant.kiev.zoral.com.ua> <20111005144605.GC1511@deviant.kiev.zoral.com.ua> <20111005182139.GG1511@deviant.kiev.zoral.com.ua> Date: Thu, 6 Oct 2011 13:00:15 +0530 Message-ID: From: "Jayachandran C." To: Kostik Belousov Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: mips@freebsd.org Subject: Re: Mips syscall entry point X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Oct 2011 07:30:16 -0000 2011/10/5 Kostik Belousov : > On Wed, Oct 05, 2011 at 10:50:29PM +0530, Jayachandran C. wrote: >> 2011/10/5 Kostik Belousov : >> > On Wed, Oct 05, 2011 at 05:56:10PM +0530, Jayachandran C. wrote: >> >> On Wed, Oct 5, 2011 at 5:05 PM, Jayachandran C. >> >> wrote: >> >> > On Wed, Oct 5, 2011 at 3:22 AM, Kostik Belousov wrote: >> >> >> On Wed, Oct 05, 2011 at 12:11:44AM +0300, Kostik Belousov wrote: >> >> >>> Hi, >> >> >>> below is the patch, test-compiled for XLP64 only, which converts = the >> >> >>> only remaining architecture MIPS to the new syscall entry sequenc= e. >> >> >>> The advantage of the conversion is sharing most of the code with = all >> >> >>> other architectures and avoiding duplication. Also, the implement= ation >> >> >>> automatically feels the missed features for the MIPS, see the BUG= S >> >> >> s/feels/fills/, sorry >> >> >>> section in the ptrace(2). >> >> >> For the same reason, capsicum shall not work on MIPS. >> >> >> >> >> >>> >> >> >>> I am asking for you help to debug and test the patch. Please keep= me >> >> >>> on Cc:, I am not on the list. >> >> >>> >> >> >>> Thank you. >> >> >>> >> >> >>> diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h >> >> >>> index 11a1f8e..4c0b0b6 100644 >> >> [...] >> >> > >> >> > This gives me a crash when I test it on XLR (32bit compile). =A0The >> >> > crash does not look obvious - I am looking at it, hope to resolve t= his >> >> > soon. >> >> >> >> Actually it is fairly obvious :) =A0the elf*_machdep.c has to be upda= ted >> >> for using the cpu_fetch_syscall_args. With that change it comes up on >> >> 32 bit - will do a few more tests on 64 bit to see how that goes. >> >> >> >> The other minor issue I saw was the locr0 usage in trap(), in call to >> >> trapdebug_enter, =A0it is fine now since =A0TRAP_DEBUG is not defined= . >> > >> > Thank you very much. Your fix is applied, and I tried to cover both >> > locr0 and code usage. >> > >> > Will wait for your testing. >> >> This works for me, tried on o32/n32/n64 on XLR. =A0Thanks for fixing thi= s up >> . >> JC. > > Thank you again. > > Should I consider this as an approval to commit the patch ? > (I will make universe it before committing anyway). Since this is the right way of doing the syscall, my recommendation would be to check in. If there are any issues or comments later, I will hopefully be able to take care of them. JC.