From owner-svn-src-all@FreeBSD.ORG Wed Feb 3 20:23:48 2010 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 439B7106566B; Wed, 3 Feb 2010 20:23:48 +0000 (UTC) (envelope-from kib@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 33E3F8FC16; Wed, 3 Feb 2010 20:23:48 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o13KNm9U098360; Wed, 3 Feb 2010 20:23:48 GMT (envelope-from kib@svn.freebsd.org) Received: (from kib@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o13KNmPG098355; Wed, 3 Feb 2010 20:23:48 GMT (envelope-from kib@svn.freebsd.org) Message-Id: <201002032023.o13KNmPG098355@svn.freebsd.org> From: Konstantin Belousov Date: Wed, 3 Feb 2010 20:23:48 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r203441 - in head/lib/msun: amd64 i387 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Feb 2010 20:23:48 -0000 Author: kib Date: Wed Feb 3 20:23:47 2010 New Revision: 203441 URL: http://svn.freebsd.org/changeset/base/203441 Log: Placate new binutils, by using 16-bit %ax instead of 32-bit %eax as an argument for fnstsw. Explicitely specify sizes for the XMM control and status word and X87 control and status words. Reviewed by: das Tested by: avg MFC after: 2 weeks Modified: head/lib/msun/amd64/fenv.c head/lib/msun/amd64/fenv.h head/lib/msun/i387/fenv.c head/lib/msun/i387/fenv.h Modified: head/lib/msun/amd64/fenv.c ============================================================================== --- head/lib/msun/amd64/fenv.c Wed Feb 3 20:00:56 2010 (r203440) +++ head/lib/msun/amd64/fenv.c Wed Feb 3 20:23:47 2010 (r203441) @@ -86,7 +86,7 @@ fegetenv(fenv_t *envp) int feholdexcept(fenv_t *envp) { - int mxcsr; + __uint32_t mxcsr; __stmxcsr(&mxcsr); __fnstenv(&envp->__x87); @@ -101,7 +101,8 @@ feholdexcept(fenv_t *envp) int feupdateenv(const fenv_t *envp) { - int mxcsr, status; + __uint32_t mxcsr; + __uint16_t status; __fnstsw(&status); __stmxcsr(&mxcsr); @@ -113,7 +114,8 @@ feupdateenv(const fenv_t *envp) int __feenableexcept(int mask) { - int mxcsr, control, omask; + __uint32_t mxcsr, omask; + __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); @@ -129,7 +131,8 @@ __feenableexcept(int mask) int __fedisableexcept(int mask) { - int mxcsr, control, omask; + __uint32_t mxcsr, omask; + __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); Modified: head/lib/msun/amd64/fenv.h ============================================================================== --- head/lib/msun/amd64/fenv.h Wed Feb 3 20:00:56 2010 (r203440) +++ head/lib/msun/amd64/fenv.h Wed Feb 3 20:23:47 2010 (r203441) @@ -110,7 +110,8 @@ feclearexcept(int __excepts) static __inline int fegetexceptflag(fexcept_t *__flagp, int __excepts) { - int __mxcsr, __status; + __uint32_t __mxcsr; + __uint16_t __status; __stmxcsr(&__mxcsr); __fnstsw(&__status); @@ -124,7 +125,8 @@ int feraiseexcept(int __excepts); static __inline int fetestexcept(int __excepts) { - int __mxcsr, __status; + __uint32_t __mxcsr; + __uint16_t __status; __stmxcsr(&__mxcsr); __fnstsw(&__status); @@ -134,7 +136,7 @@ fetestexcept(int __excepts) static __inline int fegetround(void) { - int __control; + __uint16_t __control; /* * We assume that the x87 and the SSE unit agree on the @@ -149,7 +151,8 @@ fegetround(void) static __inline int fesetround(int __round) { - int __mxcsr, __control; + __uint32_t __mxcsr; + __uint16_t __control; if (__round & ~_ROUND_MASK) return (-1); @@ -197,7 +200,7 @@ int fedisableexcept(int __mask); static __inline int fegetexcept(void) { - int __control; + __uint16_t __control; /* * We assume that the masks for the x87 and the SSE unit are Modified: head/lib/msun/i387/fenv.c ============================================================================== --- head/lib/msun/i387/fenv.c Wed Feb 3 20:00:56 2010 (r203440) +++ head/lib/msun/i387/fenv.c Wed Feb 3 20:23:47 2010 (r203441) @@ -87,7 +87,7 @@ int fesetexceptflag(const fexcept_t *flagp, int excepts) { fenv_t env; - int mxcsr; + __uint32_t mxcsr; __fnstenv(&env); env.__status &= ~excepts; @@ -117,7 +117,7 @@ feraiseexcept(int excepts) int fegetenv(fenv_t *envp) { - int mxcsr; + __uint32_t mxcsr; __fnstenv(envp); /* @@ -135,7 +135,7 @@ fegetenv(fenv_t *envp) int feholdexcept(fenv_t *envp) { - int mxcsr; + __uint32_t mxcsr; __fnstenv(envp); __fnclex(); @@ -152,7 +152,8 @@ feholdexcept(fenv_t *envp) int feupdateenv(const fenv_t *envp) { - int mxcsr, status; + __uint32_t mxcsr; + __uint16_t status; __fnstsw(&status); if (__HAS_SSE()) @@ -167,7 +168,8 @@ feupdateenv(const fenv_t *envp) int __feenableexcept(int mask) { - int mxcsr, control, omask; + __uint32_t mxcsr, omask; + __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); @@ -188,7 +190,8 @@ __feenableexcept(int mask) int __fedisableexcept(int mask) { - int mxcsr, control, omask; + __uint32_t mxcsr, omask; + __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); Modified: head/lib/msun/i387/fenv.h ============================================================================== --- head/lib/msun/i387/fenv.h Wed Feb 3 20:00:56 2010 (r203440) +++ head/lib/msun/i387/fenv.h Wed Feb 3 20:23:47 2010 (r203441) @@ -114,7 +114,7 @@ static __inline int feclearexcept(int __excepts) { fenv_t __env; - int __mxcsr; + __uint32_t __mxcsr; if (__excepts == FE_ALL_EXCEPT) { __fnclex(); @@ -134,7 +134,8 @@ feclearexcept(int __excepts) static __inline int fegetexceptflag(fexcept_t *__flagp, int __excepts) { - int __mxcsr, __status; + __uint32_t __mxcsr; + __uint16_t __status; __fnstsw(&__status); if (__HAS_SSE()) @@ -151,7 +152,8 @@ int feraiseexcept(int __excepts); static __inline int fetestexcept(int __excepts) { - int __mxcsr, __status; + __uint32_t __mxcsr; + __uint16_t __status; __fnstsw(&__status); if (__HAS_SSE()) @@ -164,7 +166,7 @@ fetestexcept(int __excepts) static __inline int fegetround(void) { - int __control; + __uint16_t __control; /* * We assume that the x87 and the SSE unit agree on the @@ -179,7 +181,8 @@ fegetround(void) static __inline int fesetround(int __round) { - int __mxcsr, __control; + __uint32_t __mxcsr; + __uint16_t __control; if (__round & ~_ROUND_MASK) return (-1); @@ -206,7 +209,7 @@ static __inline int fesetenv(const fenv_t *__envp) { fenv_t __env = *__envp; - int __mxcsr; + __uint32_t __mxcsr; __mxcsr = __get_mxcsr(__env); __set_mxcsr(__env, 0xffffffff); @@ -234,7 +237,7 @@ int fedisableexcept(int __mask); static __inline int fegetexcept(void) { - int __control; + __uint16_t __control; /* * We assume that the masks for the x87 and the SSE unit are