From owner-p4-projects@FreeBSD.ORG Tue Oct 3 23:52:54 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 56CCD16A51B; Tue, 3 Oct 2006 23:52:54 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 2D28F16A519 for ; Tue, 3 Oct 2006 23:52:54 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id D956F43D6A for ; Tue, 3 Oct 2006 23:52:53 +0000 (GMT) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k93NqrEF044387 for ; Tue, 3 Oct 2006 23:52:53 GMT (envelope-from imp@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k93NqriK044383 for perforce@freebsd.org; Tue, 3 Oct 2006 23:52:53 GMT (envelope-from imp@freebsd.org) Date: Tue, 3 Oct 2006 23:52:53 GMT Message-Id: <200610032352.k93NqriK044383@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to imp@freebsd.org using -f From: Warner Losh To: Perforce Change Reviews Cc: Subject: PERFORCE change 107226 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 03 Oct 2006 23:52:54 -0000 http://perforce.freebsd.org/chv.cgi?CH=107226 Change 107226 by imp@imp_lighthouse on 2006/10/03 23:52:30 Need to enable this pin for GPIO access. Affected files ... .. //depot/projects/arm/src/sys/arm/at91/at91_pio.c#20 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/at91_pio.c#20 (text+ko) ==== @@ -291,6 +291,7 @@ case GPIO_CFG: /* Configure GPIO pins */ cfg = (struct gpio_cfg *)data; if (cfg->cfgmask & GPIO_CFG_INPUT) { + WR4(sc, PIO_PER, cfg->iomask); WR4(sc, PIO_OER, cfg->iomask & ~cfg->input); WR4(sc, PIO_ODR, cfg->iomask & cfg->input); }