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From: Mike Meyer <mwm@mired.org>
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Date: Sun, 17 Dec 2000 11:39:00 -0600 (CST)
To: Marc W <mwlist@akira.lanfear.com>
Cc: questions@freebsd.org
Subject: Re: Makefile Q
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Marc W <mwlist@akira.lanfear.com> types:
> Hello!
> 
> 	Hope this an appropriate question for the list.  I've got a Makefile
> and it's got the usual stuff in it, but there's one place where I can't quite
> find a way to make the rules generic.  I have to run some header files through
> Trolltech's MOC, and then compile the output.
> 
> 	So, my rules have to be like:
> 
> OBJS=moc_widget.o moc_moo.o main.o
> 
> .cc.o:
> 	$(CC) $(CFLAGS) etc ...
> 
> moc_widget.cc:  widget.h
> 	$(MOC) widget.h -o widget.cc
> 
> moc_moo.cc: moo.h
> 	$(MOC) moo.h -o moo.cc
> 
> 	This kinda sucks because for each header I add that needs to be
> preprocessed, I have to add a new target.
> 
> 	Now, what I'd REALLY like is something like:
> 
> 
> OBJS=moc_widget.o moc_moo.o main.o
> 
> .cc.o:
> 	$(CC) $(CFLAGS) etc ...
> 
> moc_$(SOMETHING).cc:
> 	$(MOC) $(SOMETHING).h -o moc_$(SOMETHING).cc
> 
> 	Any suggestions on how to do this or something similar?

I believe you want a rule that looks like so:

.h.cc:
	$(MOC) `echo $(.IMPSRC) | sed -e s/moc_// -e s/cc/h/` -o $(.IMPSRC)

though i'm not sure about passing backticks through the rules. It
would be much simpler if ytou had the moc_ on the .h files as well, os
it would be:

.h.cc:
	$(MOC) $(PREFIX).h -o $(IMPSRC)


	<mike
--
Mike Meyer <mwm@mired.org>			http://www.mired.org/home/mwm/
Independent WWW/Unix/FreeBSD consultant,	email for more information.cho


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