From owner-svn-src-all@freebsd.org Thu Apr 7 19:51:28 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7DA16B08C04; Thu, 7 Apr 2016 19:51:28 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 28071106A; Thu, 7 Apr 2016 19:51:28 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u37JpRgi004866; Thu, 7 Apr 2016 19:51:27 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u37JpRhG004863; Thu, 7 Apr 2016 19:51:27 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201604071951.u37JpRhG004863@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Thu, 7 Apr 2016 19:51:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r297684 - head/sys/arm/freescale/imx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Apr 2016 19:51:28 -0000 Author: ian Date: Thu Apr 7 19:51:27 2016 New Revision: 297684 URL: https://svnweb.freebsd.org/changeset/base/297684 Log: Remove unecessary locking, mostly from places where a read is done of a value that can't ever be in an inconsistant intermediate state even when some other thread is in the middle of writing the value/register. Locking of the hardware remains in the few places that do r-m-w operations. Locking of metadata access is restricted to places using memcpy or sprintf to modify the metadata. Modified: head/sys/arm/freescale/imx/imx_gpio.c Modified: head/sys/arm/freescale/imx/imx_gpio.c ============================================================================== --- head/sys/arm/freescale/imx/imx_gpio.c Thu Apr 7 19:17:47 2016 (r297683) +++ head/sys/arm/freescale/imx/imx_gpio.c Thu Apr 7 19:51:27 2016 (r297684) @@ -451,22 +451,27 @@ static void imx51_gpio_pin_configure(struct imx51_gpio_softc *sc, struct gpio_pin *pin, unsigned int flags) { + u_int newflags; mtx_lock_spin(&sc->sc_mtx); /* - * Manage input/output + * Manage input/output; other flags not supported yet. + * + * Note that changes to pin->gp_flags must be acccumulated in newflags + * and stored with a single writeback to gp_flags at the end, to enable + * unlocked reads of that value elsewhere. */ - if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { - pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); + if (flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) { + newflags = pin->gp_flags & ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); if (flags & GPIO_PIN_OUTPUT) { - pin->gp_flags |= GPIO_PIN_OUTPUT; + newflags |= GPIO_PIN_OUTPUT; SET4(sc, IMX_GPIO_OE_REG, (1U << pin->gp_pin)); - } - else { - pin->gp_flags |= GPIO_PIN_INPUT; + } else { + newflags |= GPIO_PIN_INPUT; CLEAR4(sc, IMX_GPIO_OE_REG, (1U << pin->gp_pin)); } + pin->gp_flags = newflags; } mtx_unlock_spin(&sc->sc_mtx); @@ -503,9 +508,7 @@ imx51_gpio_pin_getcaps(device_t dev, uin if (pin >= sc->gpio_npins) return (EINVAL); - mtx_lock_spin(&sc->sc_mtx); *caps = sc->gpio_pins[pin].gp_caps; - mtx_unlock_spin(&sc->sc_mtx); return (0); } @@ -520,9 +523,7 @@ imx51_gpio_pin_getflags(device_t dev, ui if (pin >= sc->gpio_npins) return (EINVAL); - mtx_lock_spin(&sc->sc_mtx); *flags = sc->gpio_pins[pin].gp_flags; - mtx_unlock_spin(&sc->sc_mtx); return (0); } @@ -588,9 +589,7 @@ imx51_gpio_pin_get(device_t dev, uint32_ if (pin >= sc->gpio_npins) return (EINVAL); - mtx_lock_spin(&sc->sc_mtx); *val = (READ4(sc, IMX_GPIO_DR_REG) >> pin) & 1; - mtx_unlock_spin(&sc->sc_mtx); return (0); }