From owner-svn-src-user@FreeBSD.ORG Tue Apr 6 09:04:18 2010 Return-Path: Delivered-To: svn-src-user@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EAFD21065672; Tue, 6 Apr 2010 09:04:18 +0000 (UTC) (envelope-from jmallett@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id DB7268FC0A; Tue, 6 Apr 2010 09:04:18 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o3694Ic6005635; Tue, 6 Apr 2010 09:04:18 GMT (envelope-from jmallett@svn.freebsd.org) Received: (from jmallett@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o3694IIp005633; Tue, 6 Apr 2010 09:04:18 GMT (envelope-from jmallett@svn.freebsd.org) Message-Id: <201004060904.o3694IIp005633@svn.freebsd.org> From: Juli Mallett Date: Tue, 6 Apr 2010 09:04:18 +0000 (UTC) To: src-committers@freebsd.org, svn-src-user@freebsd.org X-SVN-Group: user MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r206256 - user/jmallett/octeon/sys/mips/mips X-BeenThere: svn-src-user@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the experimental " user" src tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Apr 2010 09:04:19 -0000 Author: jmallett Date: Tue Apr 6 09:04:18 2010 New Revision: 206256 URL: http://svn.freebsd.org/changeset/base/206256 Log: o) Use CLEAR_STATUS rather than mtc0 zero, cp0_status, since the latter would disable all sorts of bits we care about. Modified: user/jmallett/octeon/sys/mips/mips/exception.S Modified: user/jmallett/octeon/sys/mips/mips/exception.S ============================================================================== --- user/jmallett/octeon/sys/mips/mips/exception.S Tue Apr 6 08:35:04 2010 (r206255) +++ user/jmallett/octeon/sys/mips/mips/exception.S Tue Apr 6 09:04:18 2010 (r206256) @@ -252,7 +252,7 @@ SlowFault: and a0, a0, a2 ; \ mtc0 a0, COP_0_STATUS_REG #endif - + /* * Save CPU and CP0 register state. * @@ -317,7 +317,7 @@ SlowFault: REG_L reg, CALLFRAME_SIZ + (SZREG * offs) (base) #define RESTORE_CPU \ - mtc0 zero,COP_0_STATUS_REG ;\ + CLEAR_STATUS ;\ RESTORE_REG(k0, SR, sp) ;\ RESTORE_REG(t0, MULLO, sp) ;\ RESTORE_REG(t1, MULHI, sp) ;\