From owner-svn-src-all@FreeBSD.ORG Fri Oct 30 16:55:32 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 38B5D106566C; Fri, 30 Oct 2009 16:55:32 +0000 (UTC) (envelope-from rnoland@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 27B9C8FC0C; Fri, 30 Oct 2009 16:55:32 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n9UGtWp5052122; Fri, 30 Oct 2009 16:55:32 GMT (envelope-from rnoland@svn.freebsd.org) Received: (from rnoland@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n9UGtWSL052120; Fri, 30 Oct 2009 16:55:32 GMT (envelope-from rnoland@svn.freebsd.org) Message-Id: <200910301655.n9UGtWSL052120@svn.freebsd.org> From: Robert Noland Date: Fri, 30 Oct 2009 16:55:32 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r198691 - head/sys/dev/drm X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Oct 2009 16:55:32 -0000 Author: rnoland Date: Fri Oct 30 16:55:31 2009 New Revision: 198691 URL: http://svn.freebsd.org/changeset/base/198691 Log: Fix blitter support for RS880 chips MFC after: 3 days Modified: head/sys/dev/drm/r600_blit.c Modified: head/sys/dev/drm/r600_blit.c ============================================================================== --- head/sys/dev/drm/r600_blit.c Fri Oct 30 16:49:38 2009 (r198690) +++ head/sys/dev/drm/r600_blit.c Fri Oct 30 16:55:31 2009 (r198691) @@ -1367,7 +1367,7 @@ set_vtx_resource(drm_radeon_private_t *d if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || - /*((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||*/ + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) cp_set_surface_sync(dev_priv, R600_TC_ACTION_ENA, 48, gpu_addr); @@ -1509,7 +1509,7 @@ set_default_state(drm_radeon_private_t * case CHIP_RV610: case CHIP_RV620: case CHIP_RS780: - /*case CHIP_RS880:*/ + case CHIP_RS880: default: num_ps_gprs = 84; num_vs_gprs = 36; @@ -1591,7 +1591,7 @@ set_default_state(drm_radeon_private_t * if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || - /*((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||*/ + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) sq_config = 0; else