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From: Kip Macy <kmacy@FreeBSD.org>
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Subject: PERFORCE change 122175 for review
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http://perforce.freebsd.org/chv.cgi?CH=122175

Change 122175 by kmacy@kmacy_vt-x:opentoe_init on 2007/06/23 01:51:31

	update Makefile for recent changes
	fix integration error in cxgb_offload.c

Affected files ...

.. //depot/projects/opentoe/sys/dev/cxgb/cxgb_offload.c#11 edit
.. //depot/projects/opentoe/sys/modules/cxgb/cxgb/Makefile#2 edit

Differences ...

==== //depot/projects/opentoe/sys/dev/cxgb/cxgb_offload.c#11 (text+ko) ====

@@ -241,7 +241,7 @@
 			/* Failover triggered by the interface link down */
 			t3_write_reg(adapter, A_XGM_RX_CTRL + mac->offset, 0);
 			t3_read_reg(adapter, A_XGM_RX_CTRL + mac->offset);
-			t3_write_reg(adapter, A_XGM_RX_CTRL + mac->;A	offset,
+			t3_write_reg(adapter, A_XGM_RX_CTRL + mac->offset,
 				     F_RXEN);
 		}
 	}

==== //depot/projects/opentoe/sys/modules/cxgb/cxgb/Makefile#2 (text+ko) ====

@@ -6,20 +6,20 @@
 KMOD=	if_cxgb
 SRCS=	cxgb_mc5.c cxgb_vsc8211.c cxgb_ael1002.c cxgb_mv88e1xxx.c 
 SRCS+=	cxgb_xgmac.c cxgb_t3_hw.c cxgb_main.c cxgb_sge.c cxgb_lro.c
-SRCS+=	uipc_mvec.c cxgb_offload.c cxgb_l2t.c
+SRCS+=	cxgb_vsc7323.c uipc_mvec.c cxgb_offload.c cxgb_l2t.c
 SRCS+=	device_if.h bus_if.h pci_if.h opt_zero.h
 
 
-CFLAGS+= -DCONFIG_CHELSIO_T3_CORE -g -DDEFAULT_JUMBO -DCONFIG_DEFINED
+CFLAGS+= -DCONFIG_CHELSIO_T3_CORE -g -DDEFAULT_JUMBO -DCONFIG_DEFINED -I${CXGB}
 
 .if ${MACHINE_ARCH} != "ia64"
 # ld is broken on ia64
-t3fw-4.0.0.bin: ${CXGB}/t3fw-4.0.0.bin.gz.uu
-	uudecode -p < ${CXGB}/t3fw-4.0.0.bin.gz.uu \
+t3fw-4.1.0.bin: ${CXGB}/t3fw-4.1.0.bin.gz.uu
+	uudecode -p < ${CXGB}/t3fw-4.1.0.bin.gz.uu \
 	| gzip -dc > ${.TARGET}
 
-FIRMWS= t3fw-4.0.0.bin:t3fw400
-CLEANFILES+= t3fw-4.0.0.bin
+FIRMWS= t3fw-4.1.0.bin:t3fw410
+CLEANFILES+= t3fw-4.1.0.bin
 .endif