From owner-freebsd-hackers Tue May 9 12:21:07 1995 Return-Path: hackers-owner Received: (from majordom@localhost) by freefall.cdrom.com (8.6.10/8.6.6) id MAA23562 for hackers-outgoing; Tue, 9 May 1995 12:21:07 -0700 Received: from estienne.cs.berkeley.edu (estienne.CS.Berkeley.EDU [128.32.42.147]) by freefall.cdrom.com (8.6.10/8.6.6) with ESMTP id MAA23556 for ; Tue, 9 May 1995 12:21:06 -0700 Received: from localhost (localhost [127.0.0.1]) by estienne.cs.berkeley.edu (8.6.11/8.6.9) with SMTP id MAA06276; Tue, 9 May 1995 12:20:46 -0700 Message-Id: <199505091920.MAA06276@estienne.cs.berkeley.edu> X-Authentication-Warning: estienne.cs.berkeley.edu: Host localhost didn't use HELO protocol To: peppe@unipg.it (Giuseppe Vitillaro) cc: freebsd-hackers@FreeBSD.org Subject: Re: Intel Plato Premiere PCI/II and edge/level triggered IRQs In-reply-to: Your message of "Tue, 09 May 1995 18:11:06 +0200." <9505091611.AA34090@egeo.unipg.it> Date: Tue, 09 May 1995 12:20:46 -0700 From: "Justin T. Gibbs" Sender: hackers-owner@FreeBSD.org Precedence: bulk >I have problem with SCSI timeouts under FreeBSD 2.0 >SNAP950412 in a system composed basically of an >Intel Plato P90 Premier PCI II (Neptune chipset) >and a PCI Adaptec 2940. Your timeouts are most likely fixed in current. >For what I read until now under freebsd,linux groups >seems that the MB I'm testing use edge-triggered IRQ >rather than level-sensitive on the PCI bus. Okay. >This is confirmed too from an online manual for >this board I found on gatekeeper.dec.com. It claims >that the version of BIOS I use now setup the card for edge-triggerd IRQ. >This was not true evidentily for previous versions. > >This seems confirmed too from the fact that using >FreeBSD-current aic7* drivers that report IRQ status as edge-triggered >the system behave correctly. > >Questions: > > (1) Anyone may confirm this is correct for this > particular MB? > > (2) Are there any way to setup the MB for use > level-sensitive IRQS? > > (3) In the case answer to question (2) is "impossible" > it would be "safe" to buy a mother in this conditions? Yes, so long as you don't share interrupts between cards. > (4) Should the kernel for this MB compiled with PCI_EDGE_INT > and what would be the perfomance penalization? Not unless you intend on sharing interrupts between cards. There would be a performance penalty. >Thanks, Peppe. -- Justin T. Gibbs ============================================== TCS Instructional Group - Programmer/Analyst 1 Cory | Po | Danube | Volga | Parker | Torus ==============================================