From owner-p4-projects@FreeBSD.ORG Sat Sep 2 16:12:01 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 0FB3F16A4E8; Sat, 2 Sep 2006 16:12:01 +0000 (UTC) X-Original-To: perforce@FreeBSD.org Delivered-To: perforce@FreeBSD.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id B878616A4DA for ; Sat, 2 Sep 2006 16:12:00 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6219343D70 for ; Sat, 2 Sep 2006 16:11:58 +0000 (GMT) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k82GBvop032627 for ; Sat, 2 Sep 2006 16:11:57 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k82GBvJv032624 for perforce@freebsd.org; Sat, 2 Sep 2006 16:11:57 GMT (envelope-from gonzo@FreeBSD.org) Date: Sat, 2 Sep 2006 16:11:57 GMT Message-Id: <200609021611.k82GBvJv032624@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 105542 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Sep 2006 16:12:01 -0000 http://perforce.freebsd.org/chv.cgi?CH=105542 Change 105542 by gonzo@gonzo_hideout on 2006/09/02 16:11:54 o Change defines of register numbers to proper ones. Affected files ... .. //depot/projects/mips2/src/lib/libstand/mips/_setjmp.S#2 edit Differences ... ==== //depot/projects/mips2/src/lib/libstand/mips/_setjmp.S#2 (text+ko) ==== @@ -34,7 +34,6 @@ #include #include -#include #if defined(LIBC_SCCS) && !defined(lint) ASMSTR("from: @(#)_setjmp.s 8.1 (Berkeley) 6/4/93") @@ -69,16 +68,16 @@ REG_LI v0, 0xACEDBADE # sigcontext magic number REG_S ra, (2 * 4)(a0) # sc_pc = return address REG_S v0, (_OFFSETOF_SC_REGS)(a0) # saved in sc_regs[0] - REG_S s0, (_R_S0 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s1, (_R_S1 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s2, (_R_S2 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s3, (_R_S3 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s4, (_R_S4 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s5, (_R_S5 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s6, (_R_S6 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s7, (_R_S7 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S sp, (_R_SP * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s8, (_R_S8 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0) cfc1 v0, $31 # too bad cant check if FP used swc1 $f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0) swc1 $f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0) @@ -113,17 +112,17 @@ REG_LI t0, 0xACEDBADE bne v0, t0, botch # jump if error addu sp, sp, 32 # does not matter, sanity - REG_L s0, (_R_S0 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s1, (_R_S1 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s2, (_R_S2 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s3, (_R_S3 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s4, (_R_S4 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s5, (_R_S5 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s6, (_R_S6 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s7, (_R_S7 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0) lw v0, (32 * 4 + _OFFSETOF_SC_FPREGS)(a0) # get fpu status - REG_L sp, (_R_SP * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s8, (_R_S8 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0) ctc1 v0, $31 lwc1 $f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0) lwc1 $f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0)