From owner-freebsd-hardware Sun Sep 28 15:18:19 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id PAA26423 for hardware-outgoing; Sun, 28 Sep 1997 15:18:19 -0700 (PDT) Received: from mercury.Sun.COM (mercury.Sun.COM [192.9.25.1]) by hub.freebsd.org (8.8.7/8.8.7) with SMTP id PAA26415 for ; Sun, 28 Sep 1997 15:18:16 -0700 (PDT) Received: from East.Sun.COM ([129.148.1.241]) by mercury.Sun.COM (SMI-8.6/mail.byaddr) with SMTP id PAA01633; Sun, 28 Sep 1997 15:17:28 -0700 Received: from suneast.East.Sun.COM by East.Sun.COM (SMI-8.6/SMI-5.3) id SAA20327; Sun, 28 Sep 1997 18:17:25 -0400 Received: from compound.east.sun.com by suneast.East.Sun.COM (SMI-8.6/SMI-SVR4) id SAA17180; Sun, 28 Sep 1997 18:17:25 -0400 Received: (from alk@localhost) by compound.east.sun.com (8.8.7/8.7.3) id RAA23164; Sun, 28 Sep 1997 17:21:22 -0500 (CDT) Date: Sun, 28 Sep 1997 17:21:22 -0500 (CDT) Reply-To: Anthony.Kimball@East.Sun.COM Message-Id: <199709282221.RAA23164@compound.east.sun.com> From: Tony Kimball MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Face: O9M"E%K;(f-Go/XDxL+pCxI5*gr[=FN@Y`cl1.Tn To: michaelv@MindBender.serv.net Cc: toj@gorilla.net, freebsd-hardware@freefall.freebsd.org Subject: Re: supermicro p6sns/p6sas References: <19970927224110.13321@my.domain> <199709280516.WAA04321@MindBender.serv.net> X-Mailer: VM 6.33 under 19.14 XEmacs Lucid Sender: owner-freebsd-hardware@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Quoth Michael L. VanLoon -- HeadCandy.com on Sat, 27 September: : Socket 8 indeed appears to have been a limited detour. Slot 1 may in : time be superceeded by something better. IIRC, Intel plans to phase out slot 1 during the coming year. : Socket 7 has a very limited future. It simply doesn't have any way of : coping with some of the new technology that will be necessary to make : any sort of performance boosts possible beyond 300MHz. The supporting argument is insufficient for the conclusion. AMD and Cyrix are actively engaged in providing alternate paths to cache. One proposed solution is to make a low-profile Socket 7 module with an on-board cache controller, making the Socket 7 interface effectively a point-to-point bus -- analogous to Slot 1. : AMD and Cyrix may indeed be able to perpetuate several years more of : Socket 7 chipsets, in the secondary market. But it will be a typical : AMD/Cyrix market, where performance is secondary, and low-cost is : king. K6 and P-II numbers are within a few months of each other, so I can't agree with the implication that it will therefore not be possible to maintain a Socket 7 system with competetive performance. I do believe that it is quite clear that Socket 7 has superior life expectancy to both Socket 8 (already hard to find many P6 parts) and Slot 1 (Intel-planned short lifespan, to be replaced by Slot 2 in 98). When Slot 2 systems are available, the situation may change, but Intel will have very little reason to repent of its planned motherboard obsolence policy unless the competitors produce a non-proprietary competetive alternative.