From owner-svn-src-stable-7@FreeBSD.ORG Tue Jun 23 16:02:04 2009 Return-Path: Delivered-To: svn-src-stable-7@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 93E101065673; Tue, 23 Jun 2009 16:02:04 +0000 (UTC) (envelope-from rnoland@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 7FA038FC13; Tue, 23 Jun 2009 16:02:04 +0000 (UTC) (envelope-from rnoland@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n5NG24w3082056; Tue, 23 Jun 2009 16:02:04 GMT (envelope-from rnoland@svn.freebsd.org) Received: (from rnoland@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n5NG247J082053; Tue, 23 Jun 2009 16:02:04 GMT (envelope-from rnoland@svn.freebsd.org) Message-Id: <200906231602.n5NG247J082053@svn.freebsd.org> From: Robert Noland Date: Tue, 23 Jun 2009 16:02:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r194730 - in stable/7/sys: . contrib/pf dev/drm X-BeenThere: svn-src-stable-7@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for only the 7-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Jun 2009 16:02:05 -0000 Author: rnoland Date: Tue Jun 23 16:02:04 2009 New Revision: 194730 URL: http://svn.freebsd.org/changeset/base/194730 Log: Merge 190595 from HEAD Simplify the radeon microcode loading. Submitted by: Christoph Mallon Modified: stable/7/sys/ (props changed) stable/7/sys/contrib/pf/ (props changed) stable/7/sys/dev/drm/r600_cp.c stable/7/sys/dev/drm/radeon_cp.c Modified: stable/7/sys/dev/drm/r600_cp.c ============================================================================== --- stable/7/sys/dev/drm/r600_cp.c Tue Jun 23 16:00:14 2009 (r194729) +++ stable/7/sys/dev/drm/r600_cp.c Tue Jun 23 16:02:04 2009 (r194730) @@ -282,6 +282,8 @@ static void r600_vm_init(struct drm_devi /* load r600 microcode */ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv) { + const u32 (*cp)[3]; + const u32 *pfp; int i; r600_do_cp_stop(dev_priv); @@ -298,116 +300,60 @@ static void r600_cp_load_microcode(drm_r RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); - if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600)) { - DRM_INFO("Loading R600 CP Microcode\n"); - for (i = 0; i < PM4_UCODE_SIZE; i++) { - RADEON_WRITE(R600_CP_ME_RAM_DATA, - R600_cp_microcode[i][0]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - R600_cp_microcode[i][1]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - R600_cp_microcode[i][2]); - } - - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading R600 PFP Microcode\n"); - for (i = 0; i < PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, R600_pfp_microcode[i]); - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610)) { - DRM_INFO("Loading RV610 CP Microcode\n"); - for (i = 0; i < PM4_UCODE_SIZE; i++) { - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV610_cp_microcode[i][0]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV610_cp_microcode[i][1]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV610_cp_microcode[i][2]); - } - - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV610 PFP Microcode\n"); - for (i = 0; i < PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV610_pfp_microcode[i]); - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) { - DRM_INFO("Loading RV630 CP Microcode\n"); - for (i = 0; i < PM4_UCODE_SIZE; i++) { - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV630_cp_microcode[i][0]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV630_cp_microcode[i][1]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV630_cp_microcode[i][2]); - } - - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV630 PFP Microcode\n"); - for (i = 0; i < PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV630_pfp_microcode[i]); - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620)) { - DRM_INFO("Loading RV620 CP Microcode\n"); - for (i = 0; i < PM4_UCODE_SIZE; i++) { - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV620_cp_microcode[i][0]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV620_cp_microcode[i][1]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV620_cp_microcode[i][2]); - } - - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV620 PFP Microcode\n"); - for (i = 0; i < PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV620_pfp_microcode[i]); - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) { - DRM_INFO("Loading RV635 CP Microcode\n"); - for (i = 0; i < PM4_UCODE_SIZE; i++) { - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV635_cp_microcode[i][0]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV635_cp_microcode[i][1]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV635_cp_microcode[i][2]); - } + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_R600: + DRM_INFO("Loading R600 Microcode\n"); + cp = R600_cp_microcode; + pfp = R600_pfp_microcode; + break; + case CHIP_RV610: + DRM_INFO("Loading RV610 Microcode\n"); + cp = RV610_cp_microcode; + pfp = RV610_pfp_microcode; + break; + case CHIP_RV630: + DRM_INFO("Loading RV630 Microcode\n"); + cp = RV630_cp_microcode; + pfp = RV630_pfp_microcode; + break; + case CHIP_RV620: + DRM_INFO("Loading RV620 Microcode\n"); + cp = RV620_cp_microcode; + pfp = RV620_pfp_microcode; + break; + case CHIP_RV635: + DRM_INFO("Loading RV635 Microcode\n"); + cp = RV635_cp_microcode; + pfp = RV635_pfp_microcode; + break; + case CHIP_RV670: + DRM_INFO("Loading RV670 Microcode\n"); + cp = RV670_cp_microcode; + pfp = RV670_pfp_microcode; + break; + case CHIP_RS780: + DRM_INFO("Loading RS780 Microcode\n"); + cp = RS780_cp_microcode; + pfp = RS780_pfp_microcode; + break; + default: + goto no_microcode; + } - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV635 PFP Microcode\n"); - for (i = 0; i < PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV635_pfp_microcode[i]); - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670)) { - DRM_INFO("Loading RV670 CP Microcode\n"); - for (i = 0; i < PM4_UCODE_SIZE; i++) { - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV670_cp_microcode[i][0]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV670_cp_microcode[i][1]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RV670_cp_microcode[i][2]); - } + for (i = 0; i != PM4_UCODE_SIZE; i++) { + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i][0]); + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i][1]); + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i][2]); + } - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV670 PFP Microcode\n"); - for (i = 0; i < PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]); - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) { - DRM_INFO("Loading RS780 CP Microcode\n"); - for (i = 0; i < PM4_UCODE_SIZE; i++) { - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RS780_cp_microcode[i][0]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RS780_cp_microcode[i][1]); - RADEON_WRITE(R600_CP_ME_RAM_DATA, - RS780_cp_microcode[i][2]); - } + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); + for (i = 0; i != PFP_UCODE_SIZE; i++) + RADEON_WRITE(R600_CP_PFP_UCODE_DATA, pfp[i]); +no_microcode:; - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RS780 PFP Microcode\n"); - for (i = 0; i < PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]); - } RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0); - } static void r700_vm_init(struct drm_device *dev) @@ -465,6 +411,8 @@ static void r700_vm_init(struct drm_devi /* load r600 microcode */ static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv) { + const u32 *pfp; + const u32 *cp; int i; r600_do_cp_stop(dev_priv); @@ -479,51 +427,40 @@ static void r700_cp_load_microcode(drm_r DRM_UDELAY(15000); RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_RV770: + DRM_INFO("Loading RV770 Microcode\n"); + pfp = RV770_pfp_microcode; + cp = RV770_cp_microcode; + break; + case CHIP_RV730: + DRM_INFO("Loading RV730 Microcode\n"); + pfp = RV730_pfp_microcode; + cp = RV730_cp_microcode; + break; + case CHIP_RV710: + DRM_INFO("Loading RV710 Microcode\n"); + pfp = RV710_pfp_microcode; + cp = RV710_cp_microcode; + break; + default: + goto no_microcode; + } + + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); + for (i = 0; i != R700_PFP_UCODE_SIZE; i++) + RADEON_WRITE(R600_CP_PFP_UCODE_DATA, pfp[i]); + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)) { - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV770 PFP Microcode\n"); - for (i = 0; i < R700_PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV770_pfp_microcode[i]); - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - - RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); - DRM_INFO("Loading RV770 CP Microcode\n"); - for (i = 0; i < R700_PM4_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_ME_RAM_DATA, RV770_cp_microcode[i]); - RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); - - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV730)) { - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV730 PFP Microcode\n"); - for (i = 0; i < R700_PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV730_pfp_microcode[i]); - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - - RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); - DRM_INFO("Loading RV730 CP Microcode\n"); - for (i = 0; i < R700_PM4_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_ME_RAM_DATA, RV730_cp_microcode[i]); - RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); - - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) { - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - DRM_INFO("Loading RV710 PFP Microcode\n"); - for (i = 0; i < R700_PFP_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV710_pfp_microcode[i]); - RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); - - RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); - DRM_INFO("Loading RV710 CP Microcode\n"); - for (i = 0; i < R700_PM4_UCODE_SIZE; i++) - RADEON_WRITE(R600_CP_ME_RAM_DATA, RV710_cp_microcode[i]); - RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); + RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); + for (i = 0; i != R700_PM4_UCODE_SIZE; i++) + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i]); + RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); +no_microcode:; - } RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0); - } static void r600_test_writeback(drm_radeon_private_t *dev_priv) Modified: stable/7/sys/dev/drm/radeon_cp.c ============================================================================== --- stable/7/sys/dev/drm/radeon_cp.c Tue Jun 23 16:00:14 2009 (r194729) +++ stable/7/sys/dev/drm/radeon_cp.c Tue Jun 23 16:02:04 2009 (r194730) @@ -455,88 +455,70 @@ static void radeon_init_pipes(drm_radeon /* Load the microcode for the CP */ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv) { + const u32 (*cp)[2]; int i; + DRM_DEBUG("\n"); radeon_do_wait_for_idle(dev_priv); RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0); - if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R100) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV100) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV200) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS100) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS200)) { + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_R100: + case CHIP_RV100: + case CHIP_RV200: + case CHIP_RS100: + case CHIP_RS200: DRM_INFO("Loading R100 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R100_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R100_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R200) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV250) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV280) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS300)) { + cp = R100_cp_microcode; + break; + case CHIP_R200: + case CHIP_RV250: + case CHIP_RV280: + case CHIP_RS300: DRM_INFO("Loading R200 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R200_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R200_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) { + cp = R200_cp_microcode; + break; + case CHIP_R300: + case CHIP_R350: + case CHIP_RV350: + case CHIP_RV380: + case CHIP_RS400: + case CHIP_RS480: DRM_INFO("Loading R300 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R300_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R300_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R423) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV410)) { + cp = R300_cp_microcode; + break; + case CHIP_R420: + case CHIP_R423: + case CHIP_RV410: DRM_INFO("Loading R400 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R420_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R420_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { + cp = R420_cp_microcode; + break; + case CHIP_RS690: + case CHIP_RS740: DRM_INFO("Loading RS690/RS740 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - RS690_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - RS690_cp_microcode[i][0]); - } - } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) { + cp = RS690_cp_microcode; + break; + case CHIP_RS600: DRM_INFO("Loading RS600 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - RS600_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - RS600_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R580) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) { + cp = RS600_cp_microcode; + break; + case CHIP_RV515: + case CHIP_R520: + case CHIP_RV530: + case CHIP_R580: + case CHIP_RV560: + case CHIP_RV570: DRM_INFO("Loading R500 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R520_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R520_cp_microcode[i][0]); - } + cp = R520_cp_microcode; + break; + default: + return; + } + + for (i = 0; i != 256; i++) { + RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, cp[i][1]); + RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, cp[i][0]); } }