From owner-freebsd-current@FreeBSD.ORG Sun Jan 25 11:24:34 2004 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7A5DE16A4CE for ; Sun, 25 Jan 2004 11:24:34 -0800 (PST) Received: from apollo.backplane.com (apollo.backplane.com [216.240.41.2]) by mx1.FreeBSD.org (Postfix) with ESMTP id 7A8BF43D4C for ; Sun, 25 Jan 2004 11:24:27 -0800 (PST) (envelope-from dillon@apollo.backplane.com) Received: from apollo.backplane.com (localhost [127.0.0.1]) i0PJOR82043730; Sun, 25 Jan 2004 11:24:27 -0800 (PST) (envelope-from dillon@apollo.backplane.com) Received: (from dillon@localhost) by apollo.backplane.com (8.12.9p2/8.12.9/Submit) id i0PJOQva043727; Sun, 25 Jan 2004 11:24:26 -0800 (PST) (envelope-from dillon) Date: Sun, 25 Jan 2004 11:24:26 -0800 (PST) From: Matthew Dillon Message-Id: <200401251924.i0PJOQva043727@apollo.backplane.com> To: Maxim Sobolev References: <4012806B.7090102@potentialtech.com> <4012AC47.4020409@portaone.com> cc: Bill Moran cc: current@freebsd.org Subject: Re: DragonflyBSD kernel clock improvements X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 25 Jan 2004 19:24:34 -0000 :I've ported PLL part (sys/i386/isa/clock.c change) and now I'm testing :it. I'll post the patch to this list once I will have finished. Right :now it works like a charm, but I need to get rid of the constant skew :introduced in tvtohz(). : :-Maxim Uh. It really wasn't meant to be ported. It was just some stopgap fun. The real 'solution' to the inconsistent sleep() delays is to not use 'tick' granularity for nanosleep() for small timing intervals or tail-end timing intervals. What you really want to do is bring in the variable-delay hardware timer interrupt abstraction that's going to go into DFly in the next week or so, but that will be a lot harder without the IPI messaging infrastructure. You'll have to wait, but I'll probably start posting test patches (for DFly) in one or two days once I get it working for SMP. Basically that abstraction will allow the kernel to 'register' multiple one-shot or periodic clock interrupt callbacks (with interrupt frame) on a per-cpu basis, which then in turn drives a variable load interrupt timer. At the moment I am using Timer0 for that and getting the time base from Timer2 (disabling the speaker). DFly is going to use this to 'register' periodic hardclock, statclock, and schedclock interrupts on a per-cpu basis. The idea will eventually to be to use the LAPIC in SMP systems to provide per-cpu clock interrupts but that's at least a few months away for us. Then, with that in hand, it would be possible to 'fix' nanosleep() to actually do a fine-grained sleep for the requested time period. A fine-grained nanosleep would be far more useful then a phase-synchronized tick timer. In anycase, watch for the patch sets. I think the abstraction will be portable to 5.x but you you will need to also port the IPI messaging code (which is itself an extremely useful abstraction and well worth the porting effort, IMHO). -Matt Matthew Dillon