From owner-freebsd-hardware  Mon Jul 20 13:27:54 1998
Return-Path: <owner-freebsd-hardware@FreeBSD.ORG>
Received: (from majordom@localhost)
          by hub.freebsd.org (8.8.8/8.8.8) id NAA08596
          for freebsd-hardware-outgoing; Mon, 20 Jul 1998 13:27:54 -0700 (PDT)
          (envelope-from owner-freebsd-hardware@FreeBSD.ORG)
Received: from inet.chipweb.ml.org (qmailr@c1003518-a.plstn1.sfba.home.com [24.1.82.47])
          by hub.freebsd.org (8.8.8/8.8.8) with SMTP id NAA08568
          for <freebsd-hardware@FreeBSD.ORG>; Mon, 20 Jul 1998 13:27:46 -0700 (PDT)
          (envelope-from ludwigp@bigfoot.com)
Message-Id: <199807202027.NAA08568@hub.freebsd.org>
Received: (qmail 28575 invoked from network); 20 Jul 1998 20:27:21 -0000
Received: from speedy.chipweb.ml.org (172.16.1.1)
  by inet.chipweb.ml.org with SMTP; 20 Jul 1998 20:27:21 -0000
X-Sender: ludwigp@mail.plstn1.sfba.home.com
X-Mailer: QUALCOMM Windows Eudora Pro Version 4.0.1 
Date: Mon, 20 Jul 1998 13:24:24 -0700
To: darrylo@sr.hp.com
From: Ludwig Pummer <ludwigp@bigfoot.com>
Subject: Re: Mother Board Chip Set question 
Cc: Donald Burr <dburr@pobox.com>, "Babylon (Ray)" <babylon@swcp.com>,
        FreeBSD Hardware <freebsd-hardware@FreeBSD.ORG>, questions@FreeBSD.ORG
In-Reply-To: <199807201940.MAA11718@mina.sr.hp.com>
References: <Your message of "Mon, 20 Jul 1998 10:29:56 PDT."             <199807201730.KAA06412@hub.freebsd.org>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Sender: owner-freebsd-hardware@FreeBSD.ORG
Precedence: bulk
X-Loop: FreeBSD.org

At 12:40 PM 7/20/98 -0700, Darryl Okahata wrote:
>Ludwig Pummer <ludwigp@bigfoot.com> wrote:
>
>> At 02:45 AM 7/20/98 -0700, Donald Burr wrote:
>> >The only problem with the 430TX is that it WILL NOT cache memory above the
>> >64 MB boundary.  Whether or not this will hurt your performance, really
>> >depends on how you use your machine.  For me, I could care less.
>> 
>> Actually, it can, but only with a little help. On Asus TX chipset boards,
>> there is a small socket for a 'tag SRAM' chip which would allow all memory
>> to be cached (i think the board's max is 256MB).
>
>     You're confusing TX with HX.  The TX is limited to caching only
>64MB, whereas the ASUS HX-based boards (e.g., P55T2P4) can cache past
>that with a tag RAM chip (or by the appropriate COAST module).
>
>     -- Darryl Okahata
>	Internet: darrylo@sr.hp.com

You're right. I stand corrected.
--Ludwig Pummer
ludwigp@bigfoot.com ludwigp@chipweb.ml.org
ICQ UIN: 692441   http://chipweb.home.ml.org

To Unsubscribe: send mail to majordomo@FreeBSD.org
with "unsubscribe freebsd-hardware" in the body of the message