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From: Warner Losh <imp@FreeBSD.org>
Date: Fri, 22 Jan 2010 09:55:13 +0000 (UTC)
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Subject: svn commit: r202797 - head/sys/mips/mips
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Author: imp
Date: Fri Jan 22 09:55:13 2010
New Revision: 202797
URL: http://svn.freebsd.org/changeset/base/202797

Log:
  Add a suggested improvement.

Modified:
  head/sys/mips/mips/tick.c

Modified: head/sys/mips/mips/tick.c
==============================================================================
--- head/sys/mips/mips/tick.c	Fri Jan 22 09:54:40 2010	(r202796)
+++ head/sys/mips/mips/tick.c	Fri Jan 22 09:55:13 2010	(r202797)
@@ -144,6 +144,7 @@ mips_timer_init_params(uint64_t platform
 	/*
 	 * XXX: Some MIPS32 cores update the Count register only every two
 	 * pipeline cycles.
+	 * We know this because of status registers in CP0, make it automatic.
 	 */
 	if (double_count != 0)
 		counter_freq /= 2;