From owner-freebsd-current@FreeBSD.ORG Sun Jun 20 19:27:30 2004 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id F09F616A4CE for ; Sun, 20 Jun 2004 19:27:30 +0000 (GMT) Received: from mailout10.sul.t-online.com (mailout10.sul.t-online.com [194.25.134.21]) by mx1.FreeBSD.org (Postfix) with ESMTP id 2C43843D58 for ; Sun, 20 Jun 2004 19:27:30 +0000 (GMT) (envelope-from Alexander@Leidinger.net) Received: from fwd01.aul.t-online.de by mailout10.sul.t-online.com with smtp id 1Bc7xz-0005JZ-05; Sun, 20 Jun 2004 21:26:59 +0200 Received: from Andro-Beta.Leidinger.net (TDznNvZd8ePYQUYqAxPaPqmomtso0ESVe8Uq34tDj+sgxEFCQIlr0U@[217.229.208.217]) by fmrl01.sul.t-online.com with esmtp id 1Bc7xj-0utTNo0; Sun, 20 Jun 2004 21:26:43 +0200 Received: from Magellan.Leidinger.net (Magellan.Leidinger.net [192.168.1.1]) i5KJQsR7043338; Sun, 20 Jun 2004 21:26:54 +0200 (CEST) (envelope-from Alexander@Leidinger.net) Date: Sun, 20 Jun 2004 21:28:41 +0200 From: Alexander Leidinger To: John Polstra Message-Id: <20040620212841.70071aa4@Magellan.Leidinger.net> In-Reply-To: References: <40D07430.1070504@raadradd.com> X-Mailer: Sylpheed version 0.9.11claws (GTK+ 1.2.10; i386-portbld-freebsd5.2) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Seen: false X-ID: TDznNvZd8ePYQUYqAxPaPqmomtso0ESVe8Uq34tDj+sgxEFCQIlr0U@t-dialin.net cc: Bruce M Simpson cc: current@freebsd.org cc: Erich Dollansky cc: Radek Kozlowski Subject: Re: How to determine the L2 cache size on non-AMD CPUs (automatic page queue color tuning)? X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 20 Jun 2004 19:27:31 -0000 On Wed, 16 Jun 2004 09:35:40 -0700 (PDT) John Polstra wrote: [misc/cpuid] > Yes, but it gives working code that generally shows how to get the > information. Here's a link to an Intel document "Intel(R) Processor > Idientification and the CPUID Instruction" that covers the newer CPUs: > > http://www.intel.com/design/Xeon/applnots/24161825.pdf Thanks, based upon the docs from Intel I've a version up and running now: ---snip--- FreeBSD 5.2-CURRENT #34: Sun Jun 20 21:04:28 CEST 2004 root@M87.Leidinger.net:/system/usr_src/sys/i386/compile/M87 Using 16 colors for the VM-PQ tuning (512, 8) Preloaded elf kernel "/boot/kernel/kernel" at 0xc08a9000. [...] CPU: Intel(R) Pentium(R) 4 CPU 2.40GHz (2405.46-MHz 686-class CPU) Origin = "GenuineIntel" Id = 0xf29 Stepping = 9 Features=0xbfebfbff Hyperthreading: 2 logical CPUs Extended features=0x4400 Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries 1st-level data cache: 8-KB, 4-way set associative, sectored cache, 64-byte line size Trace cache: 12K-uops, 8-way set associative 2nd-level cache: 512-KB, 8-way set associative, sectored cache, 64-byte line size real memory = 1073676288 (1023 MB) ---snip--- >From a feature point of view I don't have anything on my TODO list for this patch (I need to test the universe and fixup some '#if 0' parts). If someone wants to play a little bit with it, it's at http://www.Leidinger.net/FreeBSD/current-patches/pq.diff It should also take a L3 cache into account, if available. It would be nice if someone could review it. I'm not entirely satisfied with the identcpu.c part, but I don't know enough of the big picture of the kernel to provide a cleaner patch. Hints/suggestions are welcome. Bye, Alexander. -- I'm available to get hired (preferred in .lu). http://www.Leidinger.net Alexander @ Leidinger.net GPG fingerprint = C518 BC70 E67F 143F BE91 3365 79E2 9C60 B006 3FE7