From owner-svn-src-all@FreeBSD.ORG Sun Mar 4 17:53:41 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 085F7106564A; Sun, 4 Mar 2012 17:53:41 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E6E0F8FC08; Sun, 4 Mar 2012 17:53:40 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q24HreoR046136; Sun, 4 Mar 2012 17:53:40 GMT (envelope-from raj@svn.freebsd.org) Received: (from raj@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q24Hreiv046133; Sun, 4 Mar 2012 17:53:40 GMT (envelope-from raj@svn.freebsd.org) Message-Id: <201203041753.q24Hreiv046133@svn.freebsd.org> From: Rafal Jaworowski Date: Sun, 4 Mar 2012 17:53:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org X-SVN-Group: stable-9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r232511 - in stable/9/sys: dev/mvs i386/conf X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 04 Mar 2012 17:53:41 -0000 Author: raj Date: Sun Mar 4 17:53:40 2012 New Revision: 232511 URL: http://svn.freebsd.org/changeset/base/232511 Log: MFC r230865: Adjust mvs(4) to handle interrupt cause reg depending on the actual number of channels available - current code treats bits 4:7 in 'SATAHC interrupt mask' and 'SATAHC interrupt cause' as flags for SATA channels 2 and 3 - for embedded SATA controllers (SoC) these bits have been marked as reserved in datasheets so far, but for some new and upcoming chips they are used for purposes other than SATA Submitted by: Lukasz Plachno Reviewed by: mav Obtained from: Semihalf Modified: stable/9/sys/dev/mvs/mvs.h stable/9/sys/dev/mvs/mvs_soc.c Directory Properties: stable/9/sys/ (props changed) stable/9/sys/amd64/include/xen/ (props changed) stable/9/sys/boot/ (props changed) stable/9/sys/boot/i386/efi/ (props changed) stable/9/sys/boot/ia64/efi/ (props changed) stable/9/sys/boot/ia64/ski/ (props changed) stable/9/sys/boot/powerpc/boot1.chrp/ (props changed) stable/9/sys/boot/powerpc/ofw/ (props changed) stable/9/sys/cddl/contrib/opensolaris/ (props changed) stable/9/sys/conf/ (props changed) stable/9/sys/contrib/dev/acpica/ (props changed) stable/9/sys/contrib/octeon-sdk/ (props changed) stable/9/sys/contrib/pf/ (props changed) stable/9/sys/contrib/x86emu/ (props changed) stable/9/sys/i386/conf/XENHVM (props changed) Modified: stable/9/sys/dev/mvs/mvs.h ============================================================================== --- stable/9/sys/dev/mvs/mvs.h Sun Mar 4 17:33:22 2012 (r232510) +++ stable/9/sys/dev/mvs/mvs.h Sun Mar 4 17:53:40 2012 (r232511) @@ -61,6 +61,9 @@ #define CHIP_SOC_LED 0x2C /* SoC LED Configuration */ +/* Additional mask for SoC devices with less than 4 channels */ +#define CHIP_SOC_HC0_MASK(num) (0xff >> ((4 - (num)) * 2)) + /* Chip CCC registers */ #define CHIP_ICC 0x18008 #define CHIP_ICC_ALL_PORTS (1 << 4) /* all ports irq event */ Modified: stable/9/sys/dev/mvs/mvs_soc.c ============================================================================== --- stable/9/sys/dev/mvs/mvs_soc.c Sun Mar 4 17:33:22 2012 (r232510) +++ stable/9/sys/dev/mvs/mvs_soc.c Sun Mar 4 17:53:40 2012 (r232511) @@ -216,7 +216,9 @@ mvs_ctlr_setup(device_t dev) if (ccc) ccim |= IC_HC0_COAL_DONE; /* Enable chip interrupts */ - ctlr->gmim = (ccc ? IC_HC0_COAL_DONE : IC_DONE_HC0) | IC_ERR_HC0; + ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE : + (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) | + (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))); ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); return (0); } @@ -291,25 +293,26 @@ mvs_intr(void *data) struct mvs_controller *ctlr = data; struct mvs_intr_arg arg; void (*function)(void *); - int p; + int p, chan_num; u_int32_t ic, aic; ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC); if ((ic & IC_HC0) == 0) return; + /* Acknowledge interrupts of this HC. */ aic = 0; - if (ic & (IC_DONE_IRQ << 0)) - aic |= HC_IC_DONE(0) | HC_IC_DEV(0); - if (ic & (IC_DONE_IRQ << 2)) - aic |= HC_IC_DONE(1) | HC_IC_DEV(1); - if (ic & (IC_DONE_IRQ << 4)) - aic |= HC_IC_DONE(2) | HC_IC_DEV(2); - if (ic & (IC_DONE_IRQ << 6)) - aic |= HC_IC_DONE(3) | HC_IC_DEV(3); + + /* Processing interrupts from each initialized channel */ + for (chan_num = 0; chan_num < ctlr->channels; chan_num++) { + if (ic & (IC_DONE_IRQ << (chan_num * 2))) + aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num); + } + if (ic & IC_HC0_COAL_DONE) aic |= HC_IC_COAL; ATA_OUTL(ctlr->r_mem, HC_IC, ~aic); + /* Call per-port interrupt handler. */ for (p = 0; p < ctlr->channels; p++) { arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);