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From: Dimitry Andric <dim@FreeBSD.org>
Date: Sat, 28 Dec 2013 01:56:05 +0000 (UTC)
To: src-committers@freebsd.org, svn-src-all@freebsd.org,
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Subject: svn commit: r259989 - in stable: 10/contrib/llvm/lib/Target/X86
 9/contrib/llvm/lib/Target/X86
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Author: dim
Date: Sat Dec 28 01:56:04 2013
New Revision: 259989
URL: http://svnweb.freebsd.org/changeset/base/259989

Log:
  MFC r259888:
  
  Pull in r183971 from upstream llvm trunk:
  
    X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX
    equivalent.
  
    Give it the right register format so we can also emit it when AVX is enabled.
  
  This should fix a "Cannot select: intrinsic %llvm.x86.sse.cvtpi2ps" fatal error
  in clang while building the gnuradio port for amd64.
  
  Reported by:	db

Modified:
  stable/10/contrib/llvm/lib/Target/X86/X86InstrMMX.td
Directory Properties:
  stable/10/   (props changed)

Changes in other areas also in this revision:
Modified:
  stable/9/contrib/llvm/lib/Target/X86/X86InstrMMX.td
Directory Properties:
  stable/9/contrib/llvm/   (props changed)

Modified: stable/10/contrib/llvm/lib/Target/X86/X86InstrMMX.td
==============================================================================
--- stable/10/contrib/llvm/lib/Target/X86/X86InstrMMX.td	Sat Dec 28 01:52:52 2013	(r259988)
+++ stable/10/contrib/llvm/lib/Target/X86/X86InstrMMX.td	Sat Dec 28 01:56:04 2013	(r259989)
@@ -189,13 +189,14 @@ multiclass sse12_cvt_pint<bits<8> opc, R
 multiclass sse12_cvt_pint_3addr<bits<8> opc, RegisterClass SrcRC,
                     RegisterClass DstRC, Intrinsic Int, X86MemOperand x86memop,
                     PatFrag ld_frag, string asm, Domain d> {
-  def irr : PI<opc, MRMSrcReg, (outs DstRC:$dst),(ins DstRC:$src1, SrcRC:$src2),
-              asm, [(set DstRC:$dst, (Int DstRC:$src1, SrcRC:$src2))], 
-              NoItinerary, d>;
-  def irm : PI<opc, MRMSrcMem, (outs DstRC:$dst),
-                   (ins DstRC:$src1, x86memop:$src2), asm,
-              [(set DstRC:$dst, (Int DstRC:$src1, (ld_frag addr:$src2)))], 
-              NoItinerary, d>;
+  def irr : MMXPI<opc, MRMSrcReg, (outs DstRC:$dst),
+                  (ins DstRC:$src1, SrcRC:$src2), asm,
+                  [(set DstRC:$dst, (Int DstRC:$src1, SrcRC:$src2))],
+                  NoItinerary, d>;
+  def irm : MMXPI<opc, MRMSrcMem, (outs DstRC:$dst),
+                  (ins DstRC:$src1, x86memop:$src2), asm,
+                  [(set DstRC:$dst, (Int DstRC:$src1, (ld_frag addr:$src2)))],
+                  NoItinerary, d>;
 }
 
 //===----------------------------------------------------------------------===//