From owner-svn-src-all@FreeBSD.ORG Sat May 23 17:43:04 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id EF22CFAD; Sat, 23 May 2015 17:43:03 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D03351A3B; Sat, 23 May 2015 17:43:03 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t4NHh3ZZ090691; Sat, 23 May 2015 17:43:03 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t4NHh3QQ090689; Sat, 23 May 2015 17:43:03 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201505231743.t4NHh3QQ090689@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Sat, 23 May 2015 17:43:03 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r283318 - in stable/10/sys/dev: mmc sdhci X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 23 May 2015 17:43:04 -0000 Author: ian Date: Sat May 23 17:43:02 2015 New Revision: 283318 URL: https://svnweb.freebsd.org/changeset/base/283318 Log: MFC r279359, r279360: For new eMMC chips, we must signal controller HC capability in OP_COND command. Detect, report and use 8-bit bus if is available. Modified: stable/10/sys/dev/mmc/mmc.c stable/10/sys/dev/sdhci/sdhci.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/dev/mmc/mmc.c ============================================================================== --- stable/10/sys/dev/mmc/mmc.c Sat May 23 17:30:30 2015 (r283317) +++ stable/10/sys/dev/mmc/mmc.c Sat May 23 17:43:02 2015 (r283318) @@ -1622,7 +1622,7 @@ mmc_go_discovery(struct mmc_softc *sc) mmc_send_app_op_cond(sc, (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); } else - mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL); + mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); mmc_discover_cards(sc); mmc_rescan_cards(sc); Modified: stable/10/sys/dev/sdhci/sdhci.c ============================================================================== --- stable/10/sys/dev/sdhci/sdhci.c Sat May 23 17:30:30 2015 (r283317) +++ stable/10/sys/dev/sdhci/sdhci.c Sat May 23 17:43:02 2015 (r283318) @@ -584,6 +584,8 @@ sdhci_init_slot(device_t dev, struct sdh "support voltages.\n"); } slot->host.caps = MMC_CAP_4_BIT_DATA; + if (caps & SDHCI_CAN_DO_8BITBUS) + slot->host.caps |= MMC_CAP_8_BIT_DATA; if (caps & SDHCI_CAN_DO_HISPD) slot->host.caps |= MMC_CAP_HSPEED; /* Decide if we have usable DMA. */ @@ -603,9 +605,11 @@ sdhci_init_slot(device_t dev, struct sdh slot->opt &= ~SDHCI_HAVE_DMA; if (bootverbose || sdhci_debug) { - slot_printf(slot, "%uMHz%s 4bits%s%s%s %s\n", + slot_printf(slot, "%uMHz%s %s%s%s%s %s\n", slot->max_clk / 1000000, (caps & SDHCI_CAN_DO_HISPD) ? " HS" : "", + (caps & MMC_CAP_8_BIT_DATA) ? "8bits" : + ((caps & MMC_CAP_4_BIT_DATA) ? "4bits" : "1bit"), (caps & SDHCI_CAN_VDD_330) ? " 3.3V" : "", (caps & SDHCI_CAN_VDD_300) ? " 3.0V" : "", (caps & SDHCI_CAN_VDD_180) ? " 1.8V" : "", @@ -692,11 +696,19 @@ sdhci_generic_update_ios(device_t brdev, } /* Configure the bus. */ sdhci_set_clock(slot, ios->clock); - sdhci_set_power(slot, (ios->power_mode == power_off)?0:ios->vdd); - if (ios->bus_width == bus_width_4) + sdhci_set_power(slot, (ios->power_mode == power_off) ? 0 : ios->vdd); + if (ios->bus_width == bus_width_8) { + slot->hostctrl |= SDHCI_CTRL_8BITBUS; + slot->hostctrl &= ~SDHCI_CTRL_4BITBUS; + } else if (ios->bus_width == bus_width_4) { + slot->hostctrl &= ~SDHCI_CTRL_8BITBUS; slot->hostctrl |= SDHCI_CTRL_4BITBUS; - else + } else if (ios->bus_width == bus_width_1) { + slot->hostctrl &= ~SDHCI_CTRL_8BITBUS; slot->hostctrl &= ~SDHCI_CTRL_4BITBUS; + } else { + panic("Invalid bus width: %d", ios->bus_width); + } if (ios->timing == bus_timing_hs && !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT)) slot->hostctrl |= SDHCI_CTRL_HISPD;