From owner-p4-projects@FreeBSD.ORG Fri Jul 7 12:47:48 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 3518D16A4E1; Fri, 7 Jul 2006 12:47:48 +0000 (UTC) X-Original-To: perforce@FreeBSD.org Delivered-To: perforce@FreeBSD.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 0AD7516A4DA for ; Fri, 7 Jul 2006 12:47:48 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id A087943D55 for ; Fri, 7 Jul 2006 12:47:47 +0000 (GMT) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k67Cllbb014139 for ; Fri, 7 Jul 2006 12:47:47 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k67CllQc014135 for perforce@freebsd.org; Fri, 7 Jul 2006 12:47:47 GMT (envelope-from gonzo@FreeBSD.org) Date: Fri, 7 Jul 2006 12:47:47 GMT Message-Id: <200607071247.k67CllQc014135@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 100875 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Jul 2006 12:47:48 -0000 http://perforce.freebsd.org/chv.cgi?CH=100875 Change 100875 by gonzo@gonzo_hq on 2006/07/07 12:46:51 entrylo0/entrylo1 registers rd/wr functions added. Affected files ... .. //depot/projects/mips2/src/sys/mips/include/cpufunc.h#10 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/include/cpufunc.h#10 (text+ko) ==== @@ -168,6 +168,8 @@ MIPS_RDRW32_COP0(status, MIPS_COP_0_STATUS); /* XXX: mips32 */ +MIPS_RDRW32_COP0(entrylo0, MIPS_COP_0_TLB_LO0); +MIPS_RDRW32_COP0(entrylo1, MIPS_COP_0_TLB_LO1); MIPS_RDRW32_COP0(entrylow, MIPS_COP_0_TLB_LOW); MIPS_RDRW32_COP0(entryhi, MIPS_COP_0_TLB_HI); MIPS_RDRW32_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK);