From owner-p4-projects@FreeBSD.ORG Sat Jul 8 17:28:23 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id C5F2E16A4E2; Sat, 8 Jul 2006 17:28:23 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id A0A5216A4E0 for ; Sat, 8 Jul 2006 17:28:23 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id AEA3043D64 for ; Sat, 8 Jul 2006 17:28:20 +0000 (GMT) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k68HSKg6093824 for ; Sat, 8 Jul 2006 17:28:20 GMT (envelope-from imp@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k68HSK0V093812 for perforce@freebsd.org; Sat, 8 Jul 2006 17:28:20 GMT (envelope-from imp@freebsd.org) Date: Sat, 8 Jul 2006 17:28:20 GMT Message-Id: <200607081728.k68HSK0V093812@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to imp@freebsd.org using -f From: Warner Losh To: Perforce Change Reviews Cc: Subject: PERFORCE change 101039 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 08 Jul 2006 17:28:24 -0000 http://perforce.freebsd.org/chv.cgi?CH=101039 Change 101039 by imp@imp_lighthouse on 2006/07/08 17:27:49 start to implement transfer. I gotta setup the busdma stuff before I can finish. Affected files ... .. //depot/projects/arm/src/sys/arm/at91/at91_spi.c#5 edit .. //depot/projects/arm/src/sys/arm/at91/at91_spireg.h#5 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/at91_spi.c#5 (text+ko) ==== @@ -51,13 +51,6 @@ struct resource *irq_res; /* IRQ resource */ struct resource *mem_res; /* Memory resource */ struct mtx sc_mtx; /* basically a perimeter lock */ - int flags; -#define XFER_PENDING 1 /* true when transfer taking place */ -#define OPENED 2 /* Device opened */ -#define RXRDY 4 -#define TXCOMP 8 -#define TXRDY 0x10 - struct cdev *cdev; }; static inline uint32_t @@ -198,7 +191,28 @@ static int at91_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) { - return EIO; + struct at91_spi_softc *sc; + + sc = device_get_softc(dev); + WR4(sc, PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS); +#if 0 + // XXX setup busdma + pSPI->SPI_RPR = (unsigned)pCommand->rx_cmd; + pSPI->SPI_RCR = pCommand->rx_cmd_size; + pSPI->SPI_TPR = (unsigned)pCommand->tx_cmd; + pSPI->SPI_TCR = pCommand->tx_cmd_size; + + pSPI->SPI_TNPR = (unsigned)pCommand->tx_data; + pSPI->SPI_TNCR = pCommand->tx_data_size; + pSPI->SPI_RNPR = (unsigned)pCommand->rx_data; + pSPI->SPI_RNCR = pCommand->rx_data_size; +#endif + WR4(sc, PDC_PTCR, PDC_PTCR_TXTEN | PDC_PTCR_RXTEN); + + // wait for completion + while (RD4(sc, SPI_SR) & SPI_SR_ENDRX) + DELAY(700); + return (0); } static device_method_t at91_spi_methods[] = { ==== //depot/projects/arm/src/sys/arm/at91/at91_spireg.h#5 (text+ko) ==== @@ -33,10 +33,27 @@ #define SPI_CR_SWRST 0x8 #define SPI_MR 0x04 /* MR: Mode Register */ #define SPI_MR_MSTR 0x01 +#define SPI_MR_PS 0x02 +#define SPI_MR_PCSDEC 0x04 +#define SPI_MR_DIV32 0x08 #define SPI_MR_MODFDIS 0x10 +#define SPI_MR_LLB 0x80 +#define SPI_MR_PSC_CS0 0xe0000 +#define SPI_MR_PSC_CS1 0xd0000 +#define SPI_MR_PSC_CS2 0xb0000 +#define SPI_MR_PSC_CS3 0x70000 #define SPI_RDR 0x08 /* RDR: Receive Data Register */ #define SPI_TDR 0x0c /* TDR: Transmit Data Register */ #define SPI_SR 0x10 /* SR: Status Register */ +#define SPI_SR_RDRF 0x00001 +#define SPI_SR_TDRE 0x00002 +#define SPI_SR_MODF 0x00004 +#define SPI_SR_OVRES 0x00008 +#define SPI_SR_ENDRX 0x00010 +#define SPI_SR_ENDTX 0x00020 +#define SPI_SR_RXBUFE 0x00040 +#define SPI_SR_TXBUFE 0x00080 +#define SPI_SR_SPIENS 0x10000 #define SPI_IER 0x14 /* IER: Interrupt Enable Regsiter */ #define SPI_IDR 0x18 /* IDR: Interrupt Disable Regsiter */ #define SPI_IMR 0x1c /* IMR: Interrupt Mask Regsiter */