From owner-cvs-src@FreeBSD.ORG Fri Apr 11 03:26:41 2008 Return-Path: Delivered-To: cvs-src@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BE23D106564A; Fri, 11 Apr 2008 03:26:41 +0000 (UTC) (envelope-from jeff@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id B1DEA8FC19; Fri, 11 Apr 2008 03:26:41 +0000 (UTC) (envelope-from jeff@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m3B3QfEI095475; Fri, 11 Apr 2008 03:26:41 GMT (envelope-from jeff@repoman.freebsd.org) Received: (from jeff@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m3B3QfjL095474; Fri, 11 Apr 2008 03:26:41 GMT (envelope-from jeff) Message-Id: <200804110326.m3B3QfjL095474@repoman.freebsd.org> From: Jeff Roberson Date: Fri, 11 Apr 2008 03:26:41 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/sys/amd64/amd64 intr_machdep.c src/sys/arm/arm intr.c src/sys/i386/i386 intr_machdep.c src/sys/ia64/ia64 interrupt.c src/sys/kern kern_cpuset.c kern_intr.c src/sys/powerpc/powerpc intr_machdep.c src/sys/sparc64/sparc64 ... X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Apr 2008 03:26:41 -0000 jeff 2008-04-11 03:26:41 UTC FreeBSD src repository Modified files: sys/amd64/amd64 intr_machdep.c sys/arm/arm intr.c sys/i386/i386 intr_machdep.c sys/ia64/ia64 interrupt.c sys/kern kern_cpuset.c kern_intr.c sys/powerpc/powerpc intr_machdep.c sys/sparc64/sparc64 intr_machdep.c sys/sun4v/sun4v intr_machdep.c sys/sys cpuset.h interrupt.h Log: - Add the interrupt vector number to intr_event_create so MI code can lookup hard interrupt events by number. Ignore the irq# for soft intrs. - Add support to cpuset for binding hardware interrupts. This has the side effect of binding any ithread associated with the hard interrupt. As per restrictions imposed by MD code we can only bind interrupts to a single cpu presently. Interrupts can be 'unbound' by binding them to all cpus. Reviewed by: jhb Sponsored by: Nokia Revision Changes Path 1.41 +1 -1 src/sys/amd64/amd64/intr_machdep.c 1.21 +1 -1 src/sys/arm/arm/intr.c 1.36 +1 -1 src/sys/i386/i386/intr_machdep.c 1.66 +1 -1 src/sys/ia64/ia64/interrupt.c 1.9 +16 -0 src/sys/kern/kern_cpuset.c 1.162 +97 -59 src/sys/kern/kern_intr.c 1.21 +1 -1 src/sys/powerpc/powerpc/intr_machdep.c 1.33 +1 -1 src/sys/sparc64/sparc64/intr_machdep.c 1.11 +2 -2 src/sys/sun4v/sun4v/intr_machdep.c 1.7 +1 -0 src/sys/sys/cpuset.h 1.41 +5 -2 src/sys/sys/interrupt.h