From owner-p4-projects@FreeBSD.ORG Thu May 25 17:56:12 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 9221916B07D; Thu, 25 May 2006 17:56:11 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 140AC16B049 for ; Thu, 25 May 2006 17:56:10 +0000 (UTC) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 7A14E43D7E for ; Thu, 25 May 2006 17:56:01 +0000 (GMT) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k4PHt5Cc016300 for ; Thu, 25 May 2006 17:55:05 GMT (envelope-from kmacy@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k4PHt4OB016297 for perforce@freebsd.org; Thu, 25 May 2006 17:55:04 GMT (envelope-from kmacy@freebsd.org) Date: Thu, 25 May 2006 17:55:04 GMT Message-Id: <200605251755.k4PHt4OB016297@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to kmacy@freebsd.org using -f From: Kip Macy To: Perforce Change Reviews Cc: Subject: PERFORCE change 97811 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 May 2006 17:56:23 -0000 http://perforce.freebsd.org/chv.cgi?CH=97811 Change 97811 by kmacy@kmacy_storage:sun4v_work on 2006/05/25 17:54:45 if we take an interrupt before saving g7 at utl0 and then resume on another cpu, g7 will be trashed by loading the pcpu scratch register over it - save g7 while still at tl 1 with interrupts disable to prevent this from happening Affected files ... .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asmacros.h#15 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#57 edit Differences ... ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asmacros.h#15 (text+ko) ==== @@ -204,10 +204,9 @@ stx %g3, [TF + TF_G3]; \ stx %g4, [TF + TF_G4]; \ stx %g5, [TF + TF_G5]; \ - stx %g6, [TF + TF_G6]; \ - stx %g7, [TF + TF_G7]; + stx %g6, [TF + TF_G6]; -#define RESTORE_GLOBALS(TF) \ +#define RESTORE_GLOBALS_USER(TF) \ ldx [TF + TF_G1], %g1; \ ldx [TF + TF_G2], %g2; \ ldx [TF + TF_G3], %g3; \ @@ -216,6 +215,16 @@ ldx [TF + TF_G6], %g6; \ ldx [TF + TF_G7], %g7; +#define RESTORE_GLOBALS_KERNEL(TF) \ + mov SCRATCH_REG_PCPU, %g7; \ + ldx [TF + TF_G1], %g1; \ + ldx [TF + TF_G2], %g2; \ + ldx [TF + TF_G3], %g3; \ + ldx [TF + TF_G4], %g4; \ + ldx [TF + TF_G5], %g5; \ + ldx [TF + TF_G6], %g6; \ + ldxa [%g0 + %g7]ASI_SCRATCHPAD, %g7; + #define SAVE_OUTS(TF) \ stx %i0, [TF + TF_O0]; \ stx %i1, [TF + TF_O1]; \ ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#57 (text+ko) ==== @@ -287,13 +287,20 @@ GET_MMFSA_SCRATCH(%g1) mov MMFSA_D_ADDR, %g2 ldxa [%g1 + %g2]ASI_REAL, %g3 - sub %g0, 1, %g4 - set trap, %g1 - ba %xcc, tl0_trap - mov T_DATA_EXCEPTION, %g2 + ba,a,pt %xcc, data_excptn_fault .align 32 .endm +ENTRY(data_excptn_fault) + mov MMFSA_D_CTX, %g7 + ldxa [%g1 + %g7]ASI_REAL, %g4 + sllx %g4, TRAP_CTX_SHIFT, %g4 + or %g4, T_DATA_EXCEPTION, %g2 + set trap, %g1 + sub %g0, 1, %g4 + ba,a,pt %xcc, tl0_trap +END(data_excptn_fault) + .macro data_miss GET_MMFSA_SCRATCH(%g1) mov MMFSA_D_TYPE, %g2 @@ -319,19 +326,19 @@ .macro tl0_align GET_MMFSA_SCRATCH(%g1) mov MMFSA_D_ADDR, %g3 -! mov MMFSA_D_CTX, %g7 + mov MMFSA_D_CTX, %g7 ldxa [%g1 + %g3]ASI_REAL, %g3 -! ldxa [%g1 + %g7]ASI_REAL, %g4 ba,a,pt %xcc, align_fault .align 32 .endm ENTRY(align_fault) -! or %g4, %g3, %g3 + ldxa [%g1 + %g7]ASI_REAL, %g4 + sllx %g4, TRAP_CTX_SHIFT, %g4 + or %g4, T_MEM_ADDRESS_NOT_ALIGNED, %g2 sub %g0, 1, %g4 set trap, %g1 - ba,pt %xcc, tl0_trap - mov T_MEM_ADDRESS_NOT_ALIGNED, %g2 + ba,a,pt %xcc, tl0_trap END(align_fault) .macro cpu_mondo @@ -913,7 +920,9 @@ ENTRY(utl0) SAVE_GLOBALS(%l7) + rd %asi, %g1 SAVE_OUTS(%l7) + stx %g1, [%l7 + TF_ASI] GET_PCPU_SCRATCH_SLOW(%g6) wrpr %g0, PSTATE_KERNEL, %pstate ! enable ints @@ -972,8 +981,10 @@ ! restore user globals and outs ! rdpr %pstate, %l1 + ldx [%l7 + TF_ASI], %g1 wrpr %l1, PSTATE_IE, %pstate - RESTORE_GLOBALS(%l7) + wr %g1, 0, %asi + RESTORE_GLOBALS_USER(%l7) wrpr %g0, 1, %gl RESTORE_OUTS(%l7) @@ -1014,42 +1025,6 @@ add %l3, WSTATE_CLEAN_OFFSET, %l3 ! convert to "clean" wstate wrpr %g0, %l3, %wstate wrpr %g0, %g1, %canrestore -#ifdef notyet - - ! - ! First attempt to restore from the watchpoint saved register window - tst %g1 - bne,a 1f - clrn [%g6 + STACK_BIAS + MPCB_RSP0] - tst %fp - be,a 1f - clrn [%g6 + STACK_BIAS + MPCB_RSP0] - ! test for user return window in pcb - ldn [%g6 + STACK_BIAS + MPCB_RSP0], %g1 - cmp %fp, %g1 - bne 1f - clrn [%g6 + STACK_BIAS + MPCB_RSP0] - restored - restore - ! restore from user return window - RESTORE_V9WINDOW(%g6 + STACK_BIAS + MPCB_RWIN0) - ! - ! Attempt to restore from the scond watchpoint saved register window - tst %fp - be,a 2f - clrn [%g6 + STACK_BIAS + MPCB_RSP1] - ldn [%g6 + STACK_BIAS + MPCB_RSP1], %g1 - cmp %fp, %g1 - bne 2f - clrn [%g6 + STACK_BIAS + MPCB_RSP1] - restored - restore - RESTORE_V9WINDOW(%g6 + STACK_BIAS + MPCB_RWIN1) - save - b,a 2f -1: - -#endif rdpr %canrestore, %g1 brnz %g1, 3f @@ -1091,7 +1066,9 @@ ENTRY(ktl0) nop SAVE_GLOBALS(%l7) + rd %asi, %g1 SAVE_OUTS(%l7) + stx %g1, [%l7 + TF_ASI] GET_PCPU_SCRATCH_SLOW(%g6) ! we really shouldn't need this ... wrpr %g0, PSTATE_KERNEL, %pstate ! enable ints @@ -1117,11 +1094,11 @@ ! restore globals and outs ! rdpr %pstate, %l1 + ldx [%l7 + TF_ASI], %g1 wrpr %l1, PSTATE_IE, %pstate - + wr %g1, 0, %asi - RESTORE_GLOBALS(%l7) - GET_PCPU_SCRATCH ! we may have changed cpus + RESTORE_GLOBALS_KERNEL(%l7) ! switch to global set 1 wrpr %g0, 1, %gl @@ -1316,7 +1293,12 @@ wrpr %g0, %g4, %pil 1: wrpr %g0, %g6, %tnpc - rdpr %cwp, %l0 + + wrpr %g0, 0, %gl + stx %g7, [%l7 + TF_G7] ! save g7 before it can be overwritten by PCPU when returning from an interrupt + wrpr %g0, 1, %gl + + rdpr %cwp, %l0 set TSTATE_KERNEL, %l1 wrpr %l1, %l0, %tstate done