From owner-svn-src-all@FreeBSD.ORG Tue Mar 22 00:14:17 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B0C591065673; Tue, 22 Mar 2011 00:14:17 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A08B98FC1C; Tue, 22 Mar 2011 00:14:17 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p2M0EHOO029921; Tue, 22 Mar 2011 00:14:17 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p2M0EHCu029919; Tue, 22 Mar 2011 00:14:17 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201103220014.p2M0EHCu029919@svn.freebsd.org> From: Adrian Chadd Date: Tue, 22 Mar 2011 00:14:17 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r219853 - head/sys/dev/ath/ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 22 Mar 2011 00:14:17 -0000 Author: adrian Date: Tue Mar 22 00:14:17 2011 New Revision: 219853 URL: http://svn.freebsd.org/changeset/base/219853 Log: Bring over a few queue changes from ath9k: * add pspoll/uapsd queue setup defaults; * enable the exponential backoff window rather than the random backoff window when doing TX contention management. Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Tue Mar 22 00:12:26 2011 (r219852) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Tue Mar 22 00:14:17 2011 (r219853) @@ -779,6 +779,14 @@ ar5416SetupTxQueue(struct ath_hal *ah, H | HAL_TXQ_ARB_LOCKOUT_GLOBAL | HAL_TXQ_BACKOFF_DISABLE; break; + case HAL_TX_QUEUE_PSPOLL: + q = 1; /* lowest priority */ + defqflags |= HAL_TXQ_DBA_GATED + | HAL_TXQ_CBR_DIS_QEMPTY + | HAL_TXQ_CBR_DIS_BEMPTY + | HAL_TXQ_ARB_LOCKOUT_GLOBAL + | HAL_TXQ_BACKOFF_DISABLE; + break; case HAL_TX_QUEUE_UAPSD: q = pCap->halTotalQueues-3; /* nextest highest priority */ if (ahp->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE) { @@ -919,6 +927,9 @@ ar5416ResetTxQueue(struct ath_hal *ah, u /* NB: always enable DCU to wait for next fragment from QCU */ dmisc = AR_D_MISC_FRAG_WAIT_EN; + /* Enable exponential backoff window */ + dmisc |= AR_D_MISC_BKOFF_PERSISTENCE; + /* * The chip reset default is to use a DCU backoff threshold of 0x2. * Restore this when programming the DCU MISC register. @@ -1021,6 +1032,12 @@ ar5416ResetTxQueue(struct ath_hal *ah, u dmisc |= SM(AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL, AR_D_MISC_ARB_LOCKOUT_CNTRL); break; + case HAL_TX_QUEUE_PSPOLL: + qmisc |= AR_Q_MISC_CBR_INCR_DIS1; + break; + case HAL_TX_QUEUE_UAPSD: + dmisc |= AR_D_MISC_POST_FR_BKOFF_DIS; + break; default: /* NB: silence compiler */ break; }