From owner-p4-projects@FreeBSD.ORG Sat Sep 8 16:09:22 2007 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E278016A419; Sat, 8 Sep 2007 16:09:21 +0000 (UTC) Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9E6E216A417 for ; Sat, 8 Sep 2007 16:09:21 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 87BED13C442 for ; Sat, 8 Sep 2007 16:09:21 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id l88G9LMH057150 for ; Sat, 8 Sep 2007 16:09:21 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id l88G9LIc057147 for perforce@freebsd.org; Sat, 8 Sep 2007 16:09:21 GMT (envelope-from gonzo@FreeBSD.org) Date: Sat, 8 Sep 2007 16:09:21 GMT Message-Id: <200709081609.l88G9LIc057147@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 126183 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 08 Sep 2007 16:09:22 -0000 http://perforce.freebsd.org/chv.cgi?CH=126183 Change 126183 by gonzo@gonzo_jeeves on 2007/09/08 16:08:25 o Mask/unmask interrupts in ICU IMASKN registers Affected files ... .. //depot/projects/mips2/src/sys/mips/mips32/idt/idtreg.h#4 edit .. //depot/projects/mips2/src/sys/mips/mips32/idt/obio.c#3 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/mips32/idt/idtreg.h#4 (text+ko) ==== @@ -47,6 +47,14 @@ #define ICU_IMASK6 0x38 #define ICU_NMIPS 0x3c +#define IDT_BASE_GPIO 0x18050000 +#define GPIO_FUNC 0x00 +#define GPIO_CFG 0x04 +#define GPIO_DATA 0x08 +#define GPIO_ILEVEL 0x0C +#define GPIO_ISTAT 0x10 +#define GPIO_NMIEN 0x14 + /* PCI controller */ #define IDT_BASE_PCI 0x18080000 #define IDT_PCI_CNTL 0x00 @@ -120,6 +128,16 @@ #define IP_IRQ(IPbit, offset) ((IPbit - 2) * 32 + (offset) + IRQ_BASE) /* The last one available IRQ */ #define IRQ_END IP_IRQ(6, 31) +#define ICU_GROUP_REG_OFFSET 0x0C + +#define ICU_IP(irq) (((irq) - IRQ_BASE) & 0x1f) +#define ICU_IP_BIT(irq) (1 << ICU_IP(irq)) +#define ICU_GROUP(irq) (((irq) - IRQ_BASE) >> 5) + +#define ICU_GROUP_MASK_REG(irq) \ + (ICU_IMASK2 + ((((irq) - IRQ_BASE) >> 5) * ICU_GROUP_REG_OFFSET)) +#define ICU_GROUP_PEND_REG(irq) \ + (ICU_IPEND2 + ((((irq) - IRQ_BASE) >> 5) * ICU_GROUP_REG_OFFSET)) #define PCI_IRQ_BASE IP_IRQ(6, 4) #define PCI_IRQ_END IP_IRQ(6, 7) ==== //depot/projects/mips2/src/sys/mips/mips32/idt/obio.c#3 (text+ko) ==== @@ -47,8 +47,13 @@ #include #include -#define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_ICU + (o))) -#define REG_WRITE(o,v) (REG_READ(o)) = (v) +#define ICU_REG_READ(o) \ + *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_ICU + (o))) +#define ICU_REG_WRITE(o,v) (ICU_REG_READ(o)) = (v) + +#define GPIO_REG_READ(o) \ + *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_GPIO + (o))) +#define GPIO_REG_WRITE(o,v) (GPIO_REG_READ(o)) = (v) static int obio_activate_resource(device_t, device_t, int, int, struct resource *); @@ -114,12 +119,6 @@ } } - /* disable all interrupts, IMASK4 is reserved, do not tuch it */ - REG_WRITE(ICU_IMASK2, 0xffffffff); - REG_WRITE(ICU_IMASK3, 0xffffffff); - REG_WRITE(ICU_IMASK5, 0xffffffff); - REG_WRITE(ICU_IMASK6, 0xffffffff); - bus_generic_probe(dev); bus_enumerate_hinted_children(dev); bus_generic_attach(dev); @@ -250,7 +249,7 @@ { struct obio_softc *sc = device_get_softc(dev); struct intr_event *event; - int irq, error; + int irq, ip_bit, error, mask, mask_register; irq = rman_get_start(ires); @@ -270,8 +269,13 @@ intr_event_add_handler(event, device_get_nameunit(child), filt, handler, arg, intr_priority(flags), flags, cookiep); - /* enable */ - /* TODO: enable corespondent IRQ line here */ + /* unmask IRQ */ + mask_register = ICU_GROUP_MASK_REG(irq); + ip_bit = ICU_IP_BIT(irq); + + mask = ICU_REG_READ(mask_register); + ICU_REG_WRITE(mask_register, mask & ~ip_bit); + return (0); } @@ -281,6 +285,7 @@ { struct obio_softc *sc = device_get_softc(dev); int irq, result; + uint32_t mask_register, mask, ip_bit; irq = rman_get_start(ires); if (irq >= NIRQS) @@ -289,7 +294,12 @@ if (sc->sc_eventstab[irq] == NULL) panic("Trying to teardown unoccupied IRQ"); - /* TODO: mask corespondent IRQ line here */ + /* mask IRQ */ + mask_register = ICU_GROUP_MASK_REG(irq); + ip_bit = ICU_IP_BIT(irq); + + mask = ICU_REG_READ(mask_register); + ICU_REG_WRITE(mask_register, mask | ip_bit); result = intr_event_remove_handler(cookie); if (!result) { @@ -305,13 +315,29 @@ struct obio_softc *sc = arg; struct intr_event *event; struct intr_handler *ih; - uint32_t irqstat; + uint32_t irqstat, ipend; int irq, thread = 0; /* TODO: handle all IRQs */ irqstat = 0; irq = 0; + +#if 0 + ipend = ICU_REG_READ(ICU_IPEND2); + printf("ipend2 = %08x!\n", ipend); + + ipend = ICU_REG_READ(ICU_IPEND3); + printf("ipend3 = %08x!\n", ipend); + + ipend = ICU_REG_READ(ICU_IPEND4); + printf("ipend4 = %08x!\n", ipend); + ipend = ICU_REG_READ(ICU_IPEND5); + printf("ipend5 = %08x!\n", ipend); + + ipend = ICU_REG_READ(ICU_IPEND6); + printf("ipend6 = %08x!\n", ipend); +#endif while (irqstat != 0) { if ((irqstat & 1) == 1) { event = sc->sc_eventstab[irq];