From owner-p4-projects@FreeBSD.ORG Wed Sep 27 04:46:49 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 9BA9116A416; Wed, 27 Sep 2006 04:46:49 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 5AF4716A407 for ; Wed, 27 Sep 2006 04:46:49 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 289DD43D53 for ; Wed, 27 Sep 2006 04:46:49 +0000 (GMT) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k8R4knsS027689 for ; Wed, 27 Sep 2006 04:46:49 GMT (envelope-from imp@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k8R4km6D027686 for perforce@freebsd.org; Wed, 27 Sep 2006 04:46:48 GMT (envelope-from imp@freebsd.org) Date: Wed, 27 Sep 2006 04:46:48 GMT Message-Id: <200609270446.k8R4km6D027686@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to imp@freebsd.org using -f From: Warner Losh To: Perforce Change Reviews Cc: Subject: PERFORCE change 106757 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Sep 2006 04:46:49 -0000 http://perforce.freebsd.org/chv.cgi?CH=106757 Change 106757 by imp@imp_lighthouse on 2006/09/27 04:45:59 fix spelling and values of a few registers. Affected files ... .. //depot/projects/arm/src/sys/arm/at91/at91_mcireg.h#3 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/at91_mcireg.h#3 (text+ko) ==== @@ -51,8 +51,8 @@ #define MCI_CR_PWSDIS (0x1u << 3) /* (MCI) Power Save Mode Disable */ #define MCI_CR_SWRST (0x1u << 7) /* (MCI) Software Reset */ /* -------- MCI_MR : (MCI Offset: 0x4) MCI Mode Register -------- */ -#define MCI_MR_CLKDIV (0x1u << 0) /* (MCI) Clock Divider */ -#define MCI_MR_PWSDIV (0x1u << 8) /* (MCI) Power Saving Divider */ +#define MCI_MR_CLKDIV (0xffu << 0) /* (MCI) Clock Divider */ +#define MCI_MR_PWSDIV (0x3fu << 8) /* (MCI) Power Saving Divider */ #define MCI_MR_PDCPADV (0x1u << 14) /* (MCI) PDC Padding Value */ #define MCI_MR_PDCMODE (0x1u << 15) /* (MCI) PDC Oriented Mode */ #define MCI_MR_BLKLEN (0x1u << 18) /* (MCI) Data Block Length */ @@ -68,8 +68,8 @@ #define MCI_DTOR_DTOMUL_65536 (0x6u << 4) /* (MCI) DTOCYC x 65536 */ #define MCI_DTOR_DTOMUL_1M (0x7u << 4) /* (MCI) DTOCYC x 1048576 */ /* -------- MCI_SDCR : (MCI Offset: 0xc) MCI SD Card Register -------- */ -#define MCI_SDCR_SCDSEL (0x1u << 0) /* (MCI) SD Card Selector */ -#define MCI_SDCR_SCDBUS (0x1u << 7) /* (MCI) SD Card Bus Width */ +#define MCI_SDCR_SDCSEL (0x1u << 0) /* (MCI) SD Card Selector */ +#define MCI_SDCR_SDCBUS (0x1u << 7) /* (MCI) SD Card Bus Width */ /* -------- MCI_CMDR : (MCI Offset: 0x14) MCI Command Register -------- */ #define MCI_CMDR_CMDNB (0x1Fu << 0) /* (MCI) Command Number */ #define MCI_CMDR_RSPTYP (0x3u << 6) /* (MCI) Response Type */