From owner-freebsd-arm@FreeBSD.ORG Wed Feb 9 09:56:05 2011 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B7DAD106566B for ; Wed, 9 Feb 2011 09:56:05 +0000 (UTC) (envelope-from mlfbsd@kanar.ci0.org) Received: from kanar.ci0.org (unknown [IPv6:2a01:e0b:1:50:40:63ff:feea:93a]) by mx1.freebsd.org (Postfix) with ESMTP id 52B3A8FC08 for ; Wed, 9 Feb 2011 09:56:05 +0000 (UTC) Received: from kanar.ci0.org (pluxor@localhost [127.0.0.1]) by kanar.ci0.org (8.14.2/8.14.3) with ESMTP id p199uUfU057373; Wed, 9 Feb 2011 10:56:30 +0100 (CET) (envelope-from mlfbsd@kanar.ci0.org) Received: (from mlfbsd@localhost) by kanar.ci0.org (8.14.2/8.14.3/Submit) id p199uUU7057372; Wed, 9 Feb 2011 10:56:30 +0100 (CET) (envelope-from mlfbsd) Date: Wed, 9 Feb 2011 10:56:30 +0100 From: Olivier Houchard To: Marcel Moolenaar Message-ID: <20110209095630.GA57320@ci0.org> References: <857AA8D9-5C41-4D80-A3B5-0D29BE051014@mac.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <857AA8D9-5C41-4D80-A3B5-0D29BE051014@mac.com> User-Agent: Mutt/1.4.2.1i Cc: arm@freebsd.org Subject: Re: Elimination of cpu_l2cache_* functions X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Feb 2011 09:56:05 -0000 Hi Marcel, On Mon, Feb 07, 2011 at 10:43:54AM -0800, Marcel Moolenaar wrote: > All, > > I've been reviewing the use of the cpu_l2cache_* functions and found > that 1) they're missing from cpu_witch() and 2) they are always used > in conjunction with either cpu_idcache_* or cpu_dcache_*. > > Since most CPU variants define them as null ops, isn't it better to > incorporate the functionality of cpu_l2cache_* in cpu_idcache_* and > cpu_dcache_* and eliminate them altogether? > > Any objections to me removing cpu_l2cache_* and therefore changing > the semantics of cpu_idcache_* and cpu_dcahce_* to apply to all > relevant cache levels? > I chose to make the l2cache functions separate from the [i]dcache functions because there's a number of cases where L1 cache flush was needed, but not L2, and that would be a performance penalty to do both. Also, more CPU variants define them as null ops now, but most new arm cpus come with a L2 cache,, so we need to think about it carefully. Regards, Olivier