From owner-svn-src-user@FreeBSD.ORG Sat Dec 21 17:25:59 2013 Return-Path: Delivered-To: svn-src-user@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 2AC83963; Sat, 21 Dec 2013 17:25:59 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 13FB11352; Sat, 21 Dec 2013 17:25:59 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rBLHPxZb030725; Sat, 21 Dec 2013 17:25:59 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.7/8.14.7/Submit) id rBLHPuEL030706; Sat, 21 Dec 2013 17:25:56 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201312211725.rBLHPuEL030706@svn.freebsd.org> From: Nathan Whitehorn Date: Sat, 21 Dec 2013 17:25:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r259688 - in user/nwhitehorn/mips_pic_if: conf mips/adm5120 mips/alchemy mips/atheros mips/beri mips/include mips/malta mips/mips X-SVN-Group: user MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-user@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the experimental " user" src tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 21 Dec 2013 17:25:59 -0000 Author: nwhitehorn Date: Sat Dec 21 17:25:55 2013 New Revision: 259688 URL: http://svnweb.freebsd.org/changeset/base/259688 Log: Make MALTA work using an adapted version of the PowerPC pic_if.m code. Every other kernel is broken for now, but the rest should be fairly mechanical. Added: user/nwhitehorn/mips_pic_if/mips/mips/mips_ic.c - copied, changed from r259687, user/nwhitehorn/mips_pic_if/mips/mips/intr_machdep.c user/nwhitehorn/mips_pic_if/mips/mips/pic_if.m - copied unchanged from r259684, head/sys/powerpc/powerpc/pic_if.m Replaced: user/nwhitehorn/mips_pic_if/mips/mips/intr_machdep.c - copied, changed from r259684, head/sys/powerpc/powerpc/intr_machdep.c Modified: user/nwhitehorn/mips_pic_if/conf/files.mips user/nwhitehorn/mips_pic_if/mips/adm5120/files.adm5120 user/nwhitehorn/mips_pic_if/mips/alchemy/files.alchemy user/nwhitehorn/mips_pic_if/mips/atheros/files.ar71xx user/nwhitehorn/mips_pic_if/mips/beri/files.beri user/nwhitehorn/mips_pic_if/mips/include/intr_machdep.h user/nwhitehorn/mips_pic_if/mips/malta/files.malta user/nwhitehorn/mips_pic_if/mips/mips/autoconf.c user/nwhitehorn/mips_pic_if/mips/mips/cpu.c user/nwhitehorn/mips_pic_if/mips/mips/machdep.c user/nwhitehorn/mips_pic_if/mips/mips/nexus.c Modified: user/nwhitehorn/mips_pic_if/conf/files.mips ============================================================================== --- user/nwhitehorn/mips_pic_if/conf/files.mips Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/conf/files.mips Sat Dec 21 17:25:55 2013 (r259688) @@ -22,14 +22,17 @@ mips/mips/fp.S standard mips/mips/freebsd32_machdep.c optional compat_freebsd32 mips/mips/gdb_machdep.c standard mips/mips/in_cksum.c optional inet +mips/mips/intr_machdep.c standard mips/mips/libkern_machdep.c standard mips/mips/locore.S standard no-obj mips/mips/machdep.c standard mips/mips/mem.c optional mem +mips/mips/mips_ic.c standard mips/mips/minidump_machdep.c standard mips/mips/mp_machdep.c optional smp mips/mips/mpboot.S optional smp mips/mips/nexus.c standard +mips/mips/pic_if.m standard mips/mips/pm_machdep.c standard mips/mips/pmap.c standard mips/mips/ptrace_machdep.c standard Modified: user/nwhitehorn/mips_pic_if/mips/adm5120/files.adm5120 ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/adm5120/files.adm5120 Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/adm5120/files.adm5120 Sat Dec 21 17:25:55 2013 (r259688) @@ -9,5 +9,4 @@ mips/adm5120/obio.c standard mips/adm5120/uart_bus_adm5120.c optional uart mips/adm5120/uart_cpu_adm5120.c optional uart mips/adm5120/uart_dev_adm5120.c optional uart -mips/mips/intr_machdep.c standard mips/mips/tick.c standard Modified: user/nwhitehorn/mips_pic_if/mips/alchemy/files.alchemy ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/alchemy/files.alchemy Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/alchemy/files.alchemy Sat Dec 21 17:25:55 2013 (r259688) @@ -5,5 +5,4 @@ mips/alchemy/alchemy_machdep.c standard mips/alchemy/obio.c standard mips/alchemy/uart_bus_alchemy.c optional uart mips/alchemy/uart_cpu_alchemy.c optional uart -mips/mips/intr_machdep.c standard mips/mips/tick.c standard Modified: user/nwhitehorn/mips_pic_if/mips/atheros/files.ar71xx ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/atheros/files.ar71xx Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/atheros/files.ar71xx Sat Dec 21 17:25:55 2013 (r259688) @@ -18,7 +18,6 @@ mips/atheros/uart_bus_ar933x.c optional mips/atheros/uart_cpu_ar933x.c optional uart_ar933x mips/atheros/uart_dev_ar933x.c optional uart_ar933x mips/atheros/ar71xx_bus_space_reversed.c standard -mips/mips/intr_machdep.c standard mips/mips/tick.c standard mips/atheros/ar71xx_setup.c standard mips/atheros/ar71xx_chip.c standard Modified: user/nwhitehorn/mips_pic_if/mips/beri/files.beri ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/beri/files.beri Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/beri/files.beri Sat Dec 21 17:25:55 2013 (r259688) @@ -18,5 +18,4 @@ dev/terasic/mtl/terasic_mtl_syscons.c op dev/terasic/mtl/terasic_mtl_text.c optional terasic_mtl mips/beri/beri_machdep.c standard mips/beri/beri_pic.c optional fdt -mips/mips/intr_machdep.c standard mips/mips/tick.c standard Modified: user/nwhitehorn/mips_pic_if/mips/include/intr_machdep.h ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/include/intr_machdep.h Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/include/intr_machdep.h Sat Dec 21 17:25:55 2013 (r259688) @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2004 Juli Mallett + * Copyright (C) 2002 Benno Rice. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -11,17 +11,16 @@ * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ @@ -29,46 +28,28 @@ #ifndef _MACHINE_INTR_MACHDEP_H_ #define _MACHINE_INTR_MACHDEP_H_ -#include +#define INTR_VECTORS 256 -#if defined(CPU_RMI) || defined(CPU_NLM) -#define XLR_MAX_INTR 64 -#else -#define NHARD_IRQS 6 -#define NSOFT_IRQS 2 -#endif +extern device_t root_pic; struct trapframe; -void cpu_init_interrupts(void); -void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *, - void *, int, int, void **); -void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*), - void *, int, int, void **); -void cpu_intr(struct trapframe *); - -/* - * Allow a platform to override the default hard interrupt mask and unmask - * functions. The 'arg' can be cast safely to an 'int' and holds the mips - * hard interrupt number to mask or unmask. - */ -typedef void (*cpu_intr_mask_t)(void *arg); -typedef void (*cpu_intr_unmask_t)(void *arg); -void cpu_set_hardintr_mask_func(cpu_intr_mask_t func); -void cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func); +driver_filter_t mips_ipi_handler; -/* - * Opaque datatype that represents intr counter - */ -typedef unsigned long* mips_intrcnt_t; +void intrcnt_add(const char *name, u_long **countp); + +void mips_register_pic(device_t, uint32_t, u_int, u_int); +u_int mips_get_irq(uint32_t, u_int); + +void mips_dispatch_intr(u_int, struct trapframe *); +int mips_enable_intr(void); +int mips_setup_intr(const char *, u_int, driver_filter_t, driver_intr_t, + void *, enum intr_type, void **); +int mips_teardown_intr(void *); +int mips_bind_intr(u_int irq, u_char cpu); +int mips_config_intr(int, enum intr_trigger, enum intr_polarity); +int mips_fw_config_intr(int irq, int sense_code); -mips_intrcnt_t mips_intrcnt_create(const char *); -void mips_intrcnt_setname(mips_intrcnt_t, const char *); +void cpu_intr(struct trapframe *tf); -static __inline void -mips_intrcnt_inc(mips_intrcnt_t counter) -{ - if (counter) - atomic_add_long(counter, 1); -} -#endif /* !_MACHINE_INTR_MACHDEP_H_ */ +#endif /* _MACHINE_INTR_MACHDEP_H_ */ Modified: user/nwhitehorn/mips_pic_if/mips/malta/files.malta ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/malta/files.malta Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/malta/files.malta Sat Dec 21 17:25:55 2013 (r259688) @@ -8,5 +8,4 @@ mips/malta/uart_bus_maltausart.c optiona dev/uart/uart_dev_ns8250.c optional uart mips/malta/malta_machdep.c standard mips/malta/yamon.c standard -mips/mips/intr_machdep.c standard mips/mips/tick.c standard Modified: user/nwhitehorn/mips_pic_if/mips/mips/autoconf.c ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/mips/autoconf.c Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/mips/autoconf.c Sat Dec 21 17:25:55 2013 (r259688) @@ -65,6 +65,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include static void configure_first(void *); @@ -102,6 +103,12 @@ static void configure_final(dummy) void *dummy; { + /* + * Now that we're guaranteed to have a PIC driver (or we'll never + * have one), program it with all the previously setup interrupts. + */ + mips_enable_intr(); + intr_enable(); cninit_finish(); Modified: user/nwhitehorn/mips_pic_if/mips/mips/cpu.c ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/mips/cpu.c Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/mips/cpu.c Sat Dec 21 17:25:55 2013 (r259688) @@ -427,8 +427,8 @@ cpu_setup_intr(device_t dev, device_t ch intr = rman_get_start(res); - cpu_establish_hardintr(device_get_nameunit(child), filt, handler, arg, - intr, flags, cookiep); + mips_setup_intr(device_get_nameunit(child), intr, filt, handler, arg, + flags, cookiep); device_printf(child, "established CPU interrupt %d\n", intr); return (0); } Copied and modified: user/nwhitehorn/mips_pic_if/mips/mips/intr_machdep.c (from r259684, head/sys/powerpc/powerpc/intr_machdep.c) ============================================================================== --- head/sys/powerpc/powerpc/intr_machdep.c Sat Dec 21 15:40:36 2013 (r259684, copy source) +++ user/nwhitehorn/mips_pic_if/mips/mips/intr_machdep.c Sat Dec 21 17:25:55 2013 (r259688) @@ -60,8 +60,6 @@ * $FreeBSD$ */ -#include "opt_isa.h" - #include #include #include @@ -88,10 +86,11 @@ #include "pic_if.h" #define MAX_STRAY_LOG 5 +#define MAX_PICS 5 static MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data"); -struct powerpc_intr { +struct mips_intr { struct intr_event *event; long *cntp; u_int irq; @@ -115,15 +114,11 @@ struct pic { static u_int intrcnt_index = 0; static struct mtx intr_table_lock; -static struct powerpc_intr *powerpc_intrs[INTR_VECTORS]; +static struct mips_intr *mips_intrs[INTR_VECTORS]; static struct pic piclist[MAX_PICS]; static u_int nvectors; /* Allocated vectors */ static u_int npics; /* PICs registered */ -#ifdef DEV_ISA -static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */ -#else static u_int nirqs = 0; /* Allocated IRQs. */ -#endif static u_int stray_count; device_t root_pic; @@ -144,11 +139,11 @@ SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER static void smp_intr_init(void *dummy __unused) { - struct powerpc_intr *i; + struct mips_intr *i; int vector; for (vector = 0; vector < nvectors; vector++) { - i = powerpc_intrs[vector]; + i = mips_intrs[vector]; if (i != NULL && i->pic == root_pic) PIC_BIND(i->pic, i->intline, i->cpu); } @@ -174,16 +169,16 @@ intrcnt_add(const char *name, u_long **c intrcnt_setname(name, idx); } -static struct powerpc_intr * +static struct mips_intr * intr_lookup(u_int irq) { char intrname[16]; - struct powerpc_intr *i, *iscan; + struct mips_intr *i, *iscan; int vector; mtx_lock(&intr_table_lock); for (vector = 0; vector < nvectors; vector++) { - i = powerpc_intrs[vector]; + i = mips_intrs[vector]; if (i != NULL && i->irq == irq) { mtx_unlock(&intr_table_lock); return (i); @@ -212,7 +207,7 @@ intr_lookup(u_int irq) for (vector = 0; vector < INTR_VECTORS && vector <= nvectors; vector++) { - iscan = powerpc_intrs[vector]; + iscan = mips_intrs[vector]; if (iscan != NULL && iscan->irq == irq) break; if (iscan == NULL && i->vector == -1) @@ -221,7 +216,7 @@ intr_lookup(u_int irq) } if (iscan == NULL && i->vector != -1) { - powerpc_intrs[i->vector] = i; + mips_intrs[i->vector] = i; i->cntindex = atomic_fetchadd_int(&intrcnt_index, 1); i->cntp = &intrcnt[i->cntindex]; sprintf(intrname, "irq%u:", i->irq); @@ -239,7 +234,7 @@ intr_lookup(u_int irq) } static int -powerpc_map_irq(struct powerpc_intr *i) +mips_map_irq(struct mips_intr *i) { struct pic *p; u_int cnt; @@ -265,35 +260,35 @@ powerpc_map_irq(struct powerpc_intr *i) } static void -powerpc_intr_eoi(void *arg) +mips_intr_eoi(void *arg) { - struct powerpc_intr *i = arg; + struct mips_intr *i = arg; PIC_EOI(i->pic, i->intline); } static void -powerpc_intr_pre_ithread(void *arg) +mips_intr_pre_ithread(void *arg) { - struct powerpc_intr *i = arg; + struct mips_intr *i = arg; PIC_MASK(i->pic, i->intline); PIC_EOI(i->pic, i->intline); } static void -powerpc_intr_post_ithread(void *arg) +mips_intr_post_ithread(void *arg) { - struct powerpc_intr *i = arg; + struct mips_intr *i = arg; PIC_UNMASK(i->pic, i->intline); } static int -powerpc_assign_intr_cpu(void *arg, u_char cpu) +mips_assign_intr_cpu(void *arg, u_char cpu) { #ifdef SMP - struct powerpc_intr *i = arg; + struct mips_intr *i = arg; if (cpu == NOCPU) i->cpu = all_cpus; @@ -310,8 +305,7 @@ powerpc_assign_intr_cpu(void *arg, u_cha } void -powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis, - u_int atpic) +mips_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis) { struct pic *p; u_int irq; @@ -319,7 +313,7 @@ powerpc_register_pic(device_t dev, uint3 mtx_lock(&intr_table_lock); - /* XXX see powerpc_get_irq(). */ + /* XXX see mips_get_irq(). */ for (idx = 0; idx < npics; idx++) { p = &piclist[idx]; if (p->node != node) @@ -334,11 +328,7 @@ powerpc_register_pic(device_t dev, uint3 p->irqs = irqs; p->ipis = ipis; if (idx == npics) { -#ifdef DEV_ISA - p->base = (atpic) ? 0 : nirqs; -#else p->base = nirqs; -#endif irq = p->base + irqs + ipis; nirqs = MAX(nirqs, irq); npics++; @@ -348,7 +338,7 @@ powerpc_register_pic(device_t dev, uint3 } u_int -powerpc_get_irq(uint32_t node, u_int pin) +mips_get_irq(uint32_t node, u_int pin) { int idx; @@ -383,9 +373,9 @@ powerpc_get_irq(uint32_t node, u_int pin } int -powerpc_enable_intr(void) +mips_enable_intr(void) { - struct powerpc_intr *i; + struct mips_intr *i; int error, vector; #ifdef SMP int n; @@ -407,9 +397,9 @@ powerpc_enable_intr(void) KASSERT(piclist[n].ipis != 0, ("%s: SMP root PIC does not supply any IPIs", __func__)); - error = powerpc_setup_intr("IPI", + error = mips_setup_intr("IPI", MAP_IRQ(piclist[n].node, piclist[n].irqs), - powerpc_ipi_handler, NULL, NULL, + mips_ipi_handler, NULL, NULL, INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie); if (error) { printf("unable to setup IPI handler\n"); @@ -420,11 +410,11 @@ powerpc_enable_intr(void) #endif for (vector = 0; vector < nvectors; vector++) { - i = powerpc_intrs[vector]; + i = mips_intrs[vector]; if (i == NULL) continue; - error = powerpc_map_irq(i); + error = mips_map_irq(i); if (error) continue; @@ -443,10 +433,10 @@ powerpc_enable_intr(void) } int -powerpc_setup_intr(const char *name, u_int irq, driver_filter_t filter, +mips_setup_intr(const char *name, u_int irq, driver_filter_t filter, driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep) { - struct powerpc_intr *i; + struct mips_intr *i; int error, enable = 0; i = intr_lookup(irq); @@ -455,8 +445,8 @@ powerpc_setup_intr(const char *name, u_i if (i->event == NULL) { error = intr_event_create(&i->event, (void *)i, 0, irq, - powerpc_intr_pre_ithread, powerpc_intr_post_ithread, - powerpc_intr_eoi, powerpc_assign_intr_cpu, "irq%u:", irq); + mips_intr_pre_ithread, mips_intr_post_ithread, + mips_intr_eoi, mips_assign_intr_cpu, "irq%u:", irq); if (error) return (error); @@ -471,7 +461,7 @@ powerpc_setup_intr(const char *name, u_i mtx_unlock(&intr_table_lock); if (!cold) { - error = powerpc_map_irq(i); + error = mips_map_irq(i); if (!error) { if (i->trig == -1) @@ -493,7 +483,7 @@ powerpc_setup_intr(const char *name, u_i } int -powerpc_teardown_intr(void *cookie) +mips_teardown_intr(void *cookie) { return (intr_event_remove_handler(cookie)); @@ -501,9 +491,9 @@ powerpc_teardown_intr(void *cookie) #ifdef SMP int -powerpc_bind_intr(u_int irq, u_char cpu) +mips_bind_intr(u_int irq, u_char cpu) { - struct powerpc_intr *i; + struct mips_intr *i; i = intr_lookup(irq); if (i == NULL) @@ -514,9 +504,9 @@ powerpc_bind_intr(u_int irq, u_char cpu) #endif int -powerpc_fw_config_intr(int irq, int sense_code) +mips_fw_config_intr(int irq, int sense_code) { - struct powerpc_intr *i; + struct mips_intr *i; i = intr_lookup(irq); if (i == NULL) @@ -536,9 +526,9 @@ powerpc_fw_config_intr(int irq, int sens } int -powerpc_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol) +mips_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol) { - struct powerpc_intr *i; + struct mips_intr *i; i = intr_lookup(irq); if (i == NULL) @@ -554,12 +544,12 @@ powerpc_config_intr(int irq, enum intr_t } void -powerpc_dispatch_intr(u_int vector, struct trapframe *tf) +mips_dispatch_intr(u_int vector, struct trapframe *tf) { - struct powerpc_intr *i; + struct mips_intr *i; struct intr_event *ie; - i = powerpc_intrs[vector]; + i = mips_intrs[vector]; if (i == NULL) goto stray; @@ -585,3 +575,16 @@ stray: if (i != NULL) PIC_MASK(i->pic, i->intline); } + +void +cpu_intr(struct trapframe *tf) +{ + + PIC_DISPATCH(root_pic, tf); + +#ifdef HWPMC_HOOKS + if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) + pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf); +#endif +} + Modified: user/nwhitehorn/mips_pic_if/mips/mips/machdep.c ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/mips/machdep.c Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/mips/machdep.c Sat Dec 21 17:25:55 2013 (r259688) @@ -213,7 +213,6 @@ cpu_startup(void *dummy) printf("avail memory = %ju (%juMB)\n", ptoa((uintmax_t)cnt.v_free_count), ptoa((uintmax_t)cnt.v_free_count) / 1048576); - cpu_init_interrupts(); /* * Set up buffers, so they can be used to read disk labels. Copied and modified: user/nwhitehorn/mips_pic_if/mips/mips/mips_ic.c (from r259687, user/nwhitehorn/mips_pic_if/mips/mips/intr_machdep.c) ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/mips/intr_machdep.c Sat Dec 21 17:24:31 2013 (r259687, copy source) +++ user/nwhitehorn/mips_pic_if/mips/mips/mips_ic.c Sat Dec 21 17:25:55 2013 (r259688) @@ -29,14 +29,13 @@ #include __FBSDID("$FreeBSD$"); -#include "opt_hwpmc_hooks.h" - #include #include +#include #include -#include -#include -#include +#include +#include +#include #include #include @@ -48,182 +47,99 @@ __FBSDID("$FreeBSD$"); #include #include -static struct intr_event *hardintr_events[NHARD_IRQS]; -static struct intr_event *softintr_events[NSOFT_IRQS]; -static mips_intrcnt_t mips_intr_counters[NSOFT_IRQS + NHARD_IRQS]; - -static int intrcnt_index; - -static cpu_intr_mask_t hardintr_mask_func; -static cpu_intr_unmask_t hardintr_unmask_func; - -mips_intrcnt_t -mips_intrcnt_create(const char* name) -{ - mips_intrcnt_t counter = &intrcnt[intrcnt_index++]; +#include "pic_if.h" - mips_intrcnt_setname(counter, name); - return counter; -} - -void -mips_intrcnt_setname(mips_intrcnt_t counter, const char *name) -{ - int idx = counter - intrcnt; - - KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter")); - - snprintf(intrnames + (MAXCOMLEN + 1) * idx, - MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name); -} - -static void -mips_mask_hard_irq(void *source) -{ - uintptr_t irq = (uintptr_t)source; +static void mips_ic_identify(driver_t *driver, device_t parent); +static int mips_ic_probe(device_t); +static int mips_ic_attach(device_t); + +static void mips_ic_dispatch(device_t, struct trapframe *); +static void mips_ic_enable(device_t, u_int, u_int); +#ifdef NOTYET +static void mips_ic_ipi(device_t, u_int); +#endif +static void mips_ic_mask(device_t, u_int); +static void mips_ic_unmask(device_t, u_int); - mips_wr_status(mips_rd_status() & ~(((1 << irq) << 8) << 2)); -} +struct mips_ic_softc { + u_int vectors[6]; +}; + +static device_method_t mips_ic_methods[] = { + /* Device interface */ + DEVMETHOD(device_identify, mips_ic_identify), + DEVMETHOD(device_probe, mips_ic_probe), + DEVMETHOD(device_attach, mips_ic_attach), + + /* PIC interface */ + DEVMETHOD(pic_dispatch, mips_ic_dispatch), + DEVMETHOD(pic_enable, mips_ic_enable), + //DEVMETHOD(pic_ipi, mips_ic_ipi), + DEVMETHOD(pic_mask, mips_ic_mask), + DEVMETHOD(pic_unmask, mips_ic_unmask), + + DEVMETHOD_END, +}; + +static driver_t mips_ic_driver = { + "mipsic", + mips_ic_methods, + sizeof(struct mips_ic_softc) +}; -static void -mips_unmask_hard_irq(void *source) -{ - uintptr_t irq = (uintptr_t)source; +static devclass_t mips_ic_devclass; - mips_wr_status(mips_rd_status() | (((1 << irq) << 8) << 2)); -} +EARLY_DRIVER_MODULE(mipsic, nexus, mips_ic_driver, mips_ic_devclass, 0, 0, + BUS_PASS_INTERRUPT); static void -mips_mask_soft_irq(void *source) +mips_ic_identify(driver_t *driver, device_t parent) { - uintptr_t irq = (uintptr_t)source; - mips_wr_status(mips_rd_status() & ~((1 << irq) << 8)); + if (device_find_child(parent, "mipsic", -1) == NULL) + BUS_ADD_CHILD(parent, 0, "mipsic", 0); } -static void -mips_unmask_soft_irq(void *source) +static int +mips_ic_probe(device_t dev) { - uintptr_t irq = (uintptr_t)source; - mips_wr_status(mips_rd_status() | ((1 << irq) << 8)); + device_set_desc(dev, "MIPS Root Interrupt Controller"); + return (BUS_PROBE_NOWILDCARD); } -/* - * Perform initialization of interrupts prior to setting - * handlings - */ -void -cpu_init_interrupts() +static int +mips_ic_attach(device_t dev) { - int i; - char name[MAXCOMLEN + 1]; - /* - * Initialize all available vectors so spare IRQ - * would show up in systat output - */ - for (i = 0; i < NSOFT_IRQS; i++) { - snprintf(name, MAXCOMLEN + 1, "sint%d:", i); - mips_intr_counters[i] = mips_intrcnt_create(name); - } - - for (i = 0; i < NHARD_IRQS; i++) { - snprintf(name, MAXCOMLEN + 1, "int%d:", i); - mips_intr_counters[NSOFT_IRQS + i] = mips_intrcnt_create(name); - } -} + mips_register_pic(dev, 0, 6, 1); -void -cpu_set_hardintr_mask_func(cpu_intr_mask_t func) -{ - - hardintr_mask_func = func; + return (0); } -void -cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func) +static void +mips_ic_mask(device_t dev, u_int irq) { - hardintr_unmask_func = func; + mips_wr_status(mips_rd_status() & ~(((1 << irq) << 8) << 2)); } -void -cpu_establish_hardintr(const char *name, driver_filter_t *filt, - void (*handler)(void*), void *arg, int irq, int flags, void **cookiep) +static void +mips_ic_unmask(device_t dev, u_int irq) { - struct intr_event *event; - int error; - - /* - * We have 6 levels, but thats 0 - 5 (not including 6) - */ - if (irq < 0 || irq >= NHARD_IRQS) - panic("%s called for unknown hard intr %d", __func__, irq); - - if (hardintr_mask_func == NULL) - hardintr_mask_func = mips_mask_hard_irq; - - if (hardintr_unmask_func == NULL) - hardintr_unmask_func = mips_unmask_hard_irq; - - event = hardintr_events[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)(uintptr_t)irq, 0, - irq, hardintr_mask_func, hardintr_unmask_func, - NULL, NULL, "int%d", irq); - if (error) - return; - hardintr_events[irq] = event; - mips_unmask_hard_irq((void*)(uintptr_t)irq); - } - - intr_event_add_handler(event, name, filt, handler, arg, - intr_priority(flags), flags, cookiep); - - mips_intrcnt_setname(mips_intr_counters[NSOFT_IRQS + irq], - event->ie_fullname); -} - -void -cpu_establish_softintr(const char *name, driver_filter_t *filt, - void (*handler)(void*), void *arg, int irq, int flags, - void **cookiep) -{ - struct intr_event *event; - int error; - -#if 0 - printf("Establish SOFT IRQ %d: filt %p handler %p arg %p\n", - irq, filt, handler, arg); -#endif - if (irq < 0 || irq > NSOFT_IRQS) - panic("%s called for unknown hard intr %d", __func__, irq); - event = softintr_events[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)(uintptr_t)irq, 0, - irq, mips_mask_soft_irq, mips_unmask_soft_irq, - NULL, NULL, "sint%d:", irq); - if (error) - return; - softintr_events[irq] = event; - mips_unmask_soft_irq((void*)(uintptr_t)irq); - } - - intr_event_add_handler(event, name, filt, handler, arg, - intr_priority(flags), flags, cookiep); - - mips_intrcnt_setname(mips_intr_counters[irq], event->ie_fullname); + mips_wr_status(mips_rd_status() | (((1 << irq) << 8) << 2)); } void -cpu_intr(struct trapframe *tf) +mips_ic_dispatch(device_t dev, struct trapframe *tf) { - struct intr_event *event; + struct mips_ic_softc *sc; register_t cause, status; int hard, i, intr; + sc = device_get_softc(dev); + critical_enter(); cause = mips_rd_cause(); @@ -238,6 +154,7 @@ cpu_intr(struct trapframe *tf) while ((i = fls(intr)) != 0) { intr &= ~(1 << (i - 1)); switch (i) { +#ifdef NOTYET case 1: case 2: /* Software interrupt. */ i--; /* Get a 0-offset interrupt. */ @@ -245,34 +162,29 @@ cpu_intr(struct trapframe *tf) event = softintr_events[i]; mips_intrcnt_inc(mips_intr_counters[i]); break; +#endif default: /* Hardware interrupt. */ i -= 2; /* Trim software interrupt bits. */ i--; /* Get a 0-offset interrupt. */ hard = 1; - event = hardintr_events[i]; - mips_intrcnt_inc(mips_intr_counters[NSOFT_IRQS + i]); + mips_dispatch_intr(sc->vectors[i], tf); break; } - - if (!event || TAILQ_EMPTY(&event->ie_handlers)) { - printf("stray %s interrupt %d\n", - hard ? "hard" : "soft", i); - continue; - } - - if (intr_event_handle(event, tf) != 0) { - printf("stray %s interrupt %d\n", - hard ? "hard" : "soft", i); - } } KASSERT(i == 0, ("all interrupts handled")); critical_exit(); +} -#ifdef HWPMC_HOOKS - if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) - pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf); -#endif +static void +mips_ic_enable(device_t dev, u_int irq, u_int vector) +{ + struct mips_ic_softc *sc; + + sc = device_get_softc(dev); + sc->vectors[irq] = vector; + mips_ic_unmask(dev, irq); } + Modified: user/nwhitehorn/mips_pic_if/mips/mips/nexus.c ============================================================================== --- user/nwhitehorn/mips_pic_if/mips/mips/nexus.c Sat Dec 21 17:24:31 2013 (r259687) +++ user/nwhitehorn/mips_pic_if/mips/mips/nexus.c Sat Dec 21 17:25:55 2013 (r259688) @@ -432,19 +432,16 @@ nexus_setup_intr(device_t dev, device_t driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep) { register_t s; - int irq; + int irq, error; + error = 0; s = intr_disable(); irq = rman_get_start(res); - if (irq >= NUM_MIPS_IRQS) { - intr_restore(s); - return (0); - } - cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg, - irq, flags, cookiep); + error = mips_setup_intr(device_get_nameunit(child), irq, filt, intr, + arg, flags, cookiep); intr_restore(s); - return (0); + return (error); } static int @@ -508,4 +505,5 @@ nexus_hinted_child(device_t bus, const c } } -DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0); +EARLY_DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0, + BUS_PASS_BUS); Copied: user/nwhitehorn/mips_pic_if/mips/mips/pic_if.m (from r259684, head/sys/powerpc/powerpc/pic_if.m) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/nwhitehorn/mips_pic_if/mips/mips/pic_if.m Sat Dec 21 17:25:55 2013 (r259688, copy of r259684, head/sys/powerpc/powerpc/pic_if.m) @@ -0,0 +1,98 @@ +#- +# Copyright (c) 1998 Doug Rabson +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGE. +# +# from: src/sys/kern/bus_if.m,v 1.21 2002/04/21 11:16:10 markm Exp +# $FreeBSD$ +# + +#include +#include +#include + +INTERFACE pic; + +CODE { + static pic_translate_code_t pic_translate_code_default; + + static void pic_translate_code_default(device_t dev, u_int irq, + int code, enum intr_trigger *trig, enum intr_polarity *pol) + { + *trig = INTR_TRIGGER_CONFORM; + *pol = INTR_POLARITY_CONFORM; + } +}; + +METHOD void bind { + device_t dev; + u_int irq; + cpuset_t cpumask; +}; + +METHOD void translate_code { + device_t dev; + u_int irq; + int code; + enum intr_trigger *trig; + enum intr_polarity *pol; +} DEFAULT pic_translate_code_default; + +METHOD void config { + device_t dev; + u_int irq; + enum intr_trigger trig; + enum intr_polarity pol; +}; + +METHOD void dispatch { + device_t dev; + struct trapframe *tf; +}; + +METHOD void enable { + device_t dev; + u_int irq; + u_int vector; +}; + +METHOD void eoi { + device_t dev; + u_int irq; +}; + +METHOD void ipi { + device_t dev; + u_int cpu; +}; + +METHOD void mask { + device_t dev; + u_int irq; +}; + +METHOD void unmask { + device_t dev; + u_int irq; +}; + *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***