From owner-freebsd-hackers Thu Jan 11 09:42:36 1996 Return-Path: owner-hackers Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id JAA06656 for hackers-outgoing; Thu, 11 Jan 1996 09:42:36 -0800 (PST) Received: from trout.sri.MT.net (trout.sri.MT.net [204.182.243.12]) by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id JAA06651 for ; Thu, 11 Jan 1996 09:42:31 -0800 (PST) Received: (from nate@localhost) by trout.sri.MT.net (8.6.12/8.6.12) id KAA01884 for hackers@freefall.freebsd.org; Thu, 11 Jan 1996 10:42:29 -0700 Date: Thu, 11 Jan 1996 10:42:29 -0700 From: Nate Williams Message-Id: <199601111742.KAA01884@trout.sri.MT.net> To: hackers@freefall.freebsd.org Subject: Pentium support for GAS Sender: owner-hackers@FreeBSD.ORG Precedence: bulk Path: helena.MT.net!news.sprintlink.net!newsfeed.internetmci.com!uwm.edu!math.ohio-state.edu!cis.ohio-state.edu!ichips.ai.mit.EDU!wscott From: wscott@ichips.ai.mit.EDU (Wayne Scott) Newsgroups: gnu.utils.bug Subject: Add support for new Pentium Pro instructions to GAS Date: 10 Jan 1996 19:26:20 -0500 Organization: GNUs Not Usenet Lines: 232 Sender: daemon@cis.ohio-state.edu Approved: bug-gnu-utils@prep.ai.mit.edu Distribution: gnu Message-ID: <199601102305.PAA09618@ichips.intel.com> Below is a patch relative to Binutils 2.6 that adds new Pentium Pro instructions to the i386 instruction set. Both the assembler and disassembler were updated. Another x86 related bug in the disassembler was also fixed. This patch is provided totally unsupported. If I get time, I plan on updating GCC to do minimal P6 optimizations. (It really doesn't need much, but some things do help.) Enjoy, Wayne Wayne Scott P6 Architecture wscott@ichips.intel.com Work #: (503) 264-4165 Disclaimer: All views expressed are my own opinions, and not necessarily those of Intel Corporation. Index: fsf/binutils/include/opcode/i386.h diff -u fsf/binutils/include/opcode/i386.h:1.1.1.1 fsf/binutils/include/opcode/i386.h:1.2.2.1 --- fsf/binutils/include/opcode/i386.h:1.1.1.1 Thu Dec 21 20:02:26 1995 +++ fsf/binutils/include/opcode/i386.h Wed Jan 10 14:47:24 1996 @@ -526,6 +526,7 @@ /* comparison (with pop) */ {"fcomp", 1, 0xd8d8, _, ShortForm, { FloatReg, 0, 0} }, +{"fcomp", 0, 0xd9d9, _, NoModrm, {0, 0, 0} }, /* alias for fcomp %st, %st(1) */ {"fcomps", 1, 0xd8, 3, Modrm, { Mem, 0, 0} }, /* compare %st0, mem float */ {"ficompl", 1, 0xda, 3, Modrm, { Mem, 0, 0} }, /* compare %st0, mem word */ {"fcompl", 1, 0xdc, 3, Modrm, { Mem, 0, 0} }, /* compare %st0, mem double */ @@ -756,6 +757,72 @@ {"rdtsc", 0, 0x0f31, _, NoModrm, { 0, 0, 0} }, {"rdmsr", 0, 0x0f32, _, NoModrm, { 0, 0, 0} }, {"cmpxchg8b", 1, 0x0fc7, 1, Modrm, { Mem, 0, 0} }, + +/* Pentium Pro extensions */ +{"cmovo", 2, 0x0f40, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovno", 2, 0x0f41, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovb", 2, 0x0f42, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovc", 2, 0x0f42, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovnae", 2, 0x0f42, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovnb", 2, 0x0f43, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovnc", 2, 0x0f43, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovae", 2, 0x0f43, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmove", 2, 0x0f44, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovz", 2, 0x0f44, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovne", 2, 0x0f45, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovnz", 2, 0x0f45, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovbe", 2, 0x0f46, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovna", 2, 0x0f46, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovnbe", 2, 0x0f47, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmova", 2, 0x0f47, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovs", 2, 0x0f48, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovns", 2, 0x0f49, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovp", 2, 0x0f4a, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovpe", 2, 0x0f4a, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovnp", 2, 0x0f4b, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovpo", 2, 0x0f4b, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovl", 2, 0x0f4c, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovnge", 2, 0x0f4c, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovnl", 2, 0x0f4d, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovge", 2, 0x0f4d, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovle", 2, 0x0f4e, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovng", 2, 0x0f4e, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"cmovnle", 2, 0x0f4f, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, +{"cmovg", 2, 0x0f4f, _, Modrm|ReverseRegRegmem, { WordReg|Mem, WordReg, 0} }, + +{"fcmovb", 2, 0xdac0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmove", 2, 0xda80, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovbe", 2, 0xdad0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovu", 2, 0xdad8, _, ShortForm, { FloatReg, FloatAcc, 0} }, + +{"fcmovnb", 2, 0xdbc0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovne", 2, 0xdb80, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovnbe", 2, 0xdbd0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovnu", 2, 0xdbd8, _, ShortForm, { FloatReg, FloatAcc, 0} }, + +{"fcomi", 2, 0xdbf0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcomip", 2, 0xdff0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fucomi", 2, 0xdbe8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fucomip", 2, 0xdfe8, _, ShortForm, { FloatReg, FloatAcc, 0} }, + +{"rdpmc", 0, 0x0f33, _, NoModrm, {0, 0, 0} }, + +{"ud2", 0, 0x0fff, _, NoModrm, {0, 0, 0} }, /* official undefined Instruction */ {"", 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */ }; Index: fsf/binutils/opcodes/i386-dis.c diff -u fsf/binutils/opcodes/i386-dis.c:1.1.1.1 fsf/binutils/opcodes/i386-dis.c:1.3.2.1 --- fsf/binutils/opcodes/i386-dis.c:1.1.1.1 Thu Dec 21 20:02:49 1995 +++ fsf/binutils/opcodes/i386-dis.c Wed Jan 10 14:47:35 1996 @@ -546,17 +546,29 @@ { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, /* 30 */ - { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "(bad)" }, + { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "rdpmc" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, /* 38 */ { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, /* 40 */ - { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, - { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, + { "cmovoS", Gv, Ev }, + { "cmovno", Gv, Ev }, + { "cmovb", Gv, Ev }, + { "cmovae", Gv, Ev }, + { "cmove", Gv, Ev }, + { "cmovne", Gv, Ev }, + { "cmovbe", Gv, Ev }, + { "cmova", Gv, Ev }, /* 48 */ - { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, - { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, + { "cmovs", Gv, Ev }, + { "cmovns", Gv, Ev }, + { "cmovp", Gv, Ev }, + { "cmovnp", Gv, Ev }, + { "cmovl", Gv, Ev }, + { "cmovnl", Gv, Ev }, + { "cmovle", Gv, Ev }, + { "cmovg", Gv, Ev }, /* 50 */ { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, @@ -681,8 +693,14 @@ { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, /* f8 */ - { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, - { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" }, + { "(bad)" }, + { "(bad)" }, + { "(bad)" }, + { "(bad)" }, + { "(bad)" }, + { "(bad)" }, + { "(bad)" }, + { "ud2" }, }; static char obuf[100]; @@ -1270,10 +1288,10 @@ }, /* da */ { - { "(bad)" }, - { "(bad)" }, - { "(bad)" }, - { "(bad)" }, + { "fcmovb", STi, ST }, + { "fcmove", STi, ST }, + { "fcmovbe", STi, ST }, + { "fcmovu", STi, ST }, { "(bad)" }, { FGRPda_5 }, { "(bad)" }, @@ -1281,13 +1299,13 @@ }, /* db */ { - { "(bad)" }, - { "(bad)" }, - { "(bad)" }, - { "(bad)" }, + { "fcmovnb", STi, ST }, + { "fcmovne", STi, ST }, + { "fcmovnbe", STi, ST }, + { "fcmovnu", STi, ST }, { FGRPdb_4 }, - { "(bad)" }, - { "(bad)" }, + { "fucomi", STi, ST }, + { "fcomi", STi, ST }, { "(bad)" }, }, /* dc */ @@ -1330,8 +1348,8 @@ { "(bad)" }, { "(bad)" }, { FGRPdf_4 }, - { "(bad)" }, - { "(bad)" }, + { "fucomip", STi, ST }, + { "fcomip", STi, ST }, { "(bad)" }, }, }; @@ -1800,6 +1818,11 @@ case b_mode: FETCH_DATA (the_info, codep + 1); disp = *(char *)codep++; + + /* sign extend number */ + if (disp >= 1<<7) { + disp -= 1<<8; + } break; case v_mode: if (dflag) @@ -1807,6 +1830,11 @@ else { disp = (short)get16 (); + + /* sign extend number */ + if (disp >= 1<<15) { + disp -= 1<<16; + } /* for some reason, a data16 prefix on a jump instruction means that the pc is masked to 16 bits after the displacement is added! */