From owner-freebsd-arch@FreeBSD.ORG Fri Mar 6 20:55:29 2015 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 5856D313; Fri, 6 Mar 2015 20:55:29 +0000 (UTC) Received: from zxy.spb.ru (zxy.spb.ru [195.70.199.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 10FBEED; Fri, 6 Mar 2015 20:55:29 +0000 (UTC) Received: from slw by zxy.spb.ru with local (Exim 4.84 (FreeBSD)) (envelope-from ) id 1YTzHE-00097g-7u; Fri, 06 Mar 2015 23:55:20 +0300 Date: Fri, 6 Mar 2015 23:55:20 +0300 From: Slawa Olhovchenkov To: John Baldwin Subject: Re: RFC: Simplfying hyperthreading distinctions Message-ID: <20150306205520.GA95179@zxy.spb.ru> References: <1640664.8z9mx3EOQs@ralph.baldwin.cx> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1640664.8z9mx3EOQs@ralph.baldwin.cx> User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: X-SA-Exim-Mail-From: slw@zxy.spb.ru X-SA-Exim-Scanned: No (on zxy.spb.ru); SAEximRunCond expanded to false Cc: 'Andriy Gapon' , freebsd-arch@freebsd.org X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Mar 2015 20:55:29 -0000 On Fri, Mar 06, 2015 at 03:44:06PM -0500, John Baldwin wrote: > Currently we go out of our way a bit to distinguish Pentium4-era > hyperthreading from more recent ("modern") hyperthreading. I suspect that > this distinction probably results in confusion more than anything else. > Intel's documentation does not make near as broad a distinction as far as I > can tell. Both types of SMT are called hyperthreading in the SDM for example. > However, we have the astonishing behavior that > 'machdep.hyperthreading_allowed' only affects "old" hyperthreads, but not > "new" ones. We also try to be overly cute in our dmesg output by using HTT > for "old" hyperthreading, and SMT for "new" hyperthreading. I propose the > following changes to simplify things a bit: > > 1) Call both "old" and "new" hyperthreading HTT in dmesg. > > 2) Change machdep.hyperthreading_allowed to apply to both new and old HTT. > However, doing this means a POLA violation in that we would now disable > modern HTT by default. Balanced against re-enabling "old" HTT by default > on an increasingly-shrinking pool of old hardware, I think the better > approach here would be to also change the default to allow HTT. > 3) Possibly add a different knob (or change the behavior of > machdep.hyperthreading_allowed) to still bring up hyperthreads, but leave > them out of the default cpuset (set 1). This would allow those threads > to be re-enabled dynamically at runtime by adjusting the mask on set 1. > The original htt settings back when 'hyperthreading_allowed' was > introduced actually permitted this via by adjusting 'machdep.hlt_cpus' at > runtime. > > What do people think? Do you have expiriment with 3)? And compare with HTT/SMT disabled in BIOS? My expirense (for may workload) with SMT is very bad -- unperdicable performance in pair threads don't allow to build high (and prdicable) performance system.