From owner-svn-src-stable-7@FreeBSD.ORG Fri Feb 4 20:27:50 2011 Return-Path: Delivered-To: svn-src-stable-7@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 888EE106566B; Fri, 4 Feb 2011 20:27:50 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 75B7B8FC13; Fri, 4 Feb 2011 20:27:50 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p14KRo8k096856; Fri, 4 Feb 2011 20:27:50 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p14KRor1096849; Fri, 4 Feb 2011 20:27:50 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <201102042027.p14KRor1096849@svn.freebsd.org> From: Pyun YongHyeon Date: Fri, 4 Feb 2011 20:27:50 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r218295 - in stable/7/sys: conf dev/mii modules/mii X-BeenThere: svn-src-stable-7@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for only the 7-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Feb 2011 20:27:50 -0000 Author: yongari Date: Fri Feb 4 20:27:50 2011 New Revision: 218295 URL: http://svn.freebsd.org/changeset/base/218295 Log: MFC r216828: Add RDC Semiconductor R6040 10/100 PHY driver. Added: stable/7/sys/dev/mii/rdcphy.c - copied unchanged from r216828, head/sys/dev/mii/rdcphy.c stable/7/sys/dev/mii/rdcphyreg.h - copied unchanged from r216828, head/sys/dev/mii/rdcphyreg.h Modified: stable/7/sys/conf/NOTES stable/7/sys/conf/files stable/7/sys/dev/mii/miidevs stable/7/sys/modules/mii/Makefile Directory Properties: stable/7/sys/ (props changed) stable/7/sys/cddl/contrib/opensolaris/ (props changed) stable/7/sys/contrib/dev/acpica/ (props changed) stable/7/sys/contrib/pf/ (props changed) Modified: stable/7/sys/conf/NOTES ============================================================================== --- stable/7/sys/conf/NOTES Fri Feb 4 20:12:45 2011 (r218294) +++ stable/7/sys/conf/NOTES Fri Feb 4 20:27:50 2011 (r218295) @@ -1742,6 +1742,7 @@ device nsphy # NatSemi DP83840A device nsphyter # NatSemi DP83843/DP83815 device pnaphy # HomePNA device qsphy # Quality Semiconductor QS6612 +device rdcphy # RDC Semiconductor R6040 device rgephy # RealTek 8169S/8110S/8211B/8211C device rlphy # RealTek 8139 device rlswitch # RealTek 8305 Modified: stable/7/sys/conf/files ============================================================================== --- stable/7/sys/conf/files Fri Feb 4 20:12:45 2011 (r218294) +++ stable/7/sys/conf/files Fri Feb 4 20:27:50 2011 (r218295) @@ -974,6 +974,7 @@ dev/mii/nsphy.c optional miibus | nsph dev/mii/nsphyter.c optional miibus | nsphyter dev/mii/pnaphy.c optional miibus | pnaphy dev/mii/qsphy.c optional miibus | qsphy +dev/mii/rdcphy.c optional miibus | rdcphy dev/mii/rgephy.c optional miibus | rgephy dev/mii/rlphy.c optional miibus | rlphy dev/mii/rlswitch.c optional rlswitch Modified: stable/7/sys/dev/mii/miidevs ============================================================================== --- stable/7/sys/dev/mii/miidevs Fri Feb 4 20:12:45 2011 (r218294) +++ stable/7/sys/dev/mii/miidevs Fri Feb 4 20:27:50 2011 (r218295) @@ -58,6 +58,7 @@ oui JMICRON 0x001b8c JMicron Technolog oui LEVEL1 0x00207b Level 1 oui NATSEMI 0x080017 National Semiconductor oui QUALSEMI 0x006051 Quality Semiconductor +oui RDC 0x000bb4 RDC Semiconductor oui REALTEK 0x000020 RealTek Semicondctor oui SEEQ 0x00a07d Seeq oui SIS 0x00e006 Silicon Integrated Systems @@ -207,6 +208,9 @@ model NATSEMI DP83865 0x0007 DP83865 10 /* Quality Semiconductor PHYs */ model QUALSEMI QS6612 0x0000 QS6612 10/100 media interface +/* RDC Semiconductor PHYs */ +model RDC R6040 0x0003 R6040 10/100 media interface + /* RealTek Semiconductor PHYs */ model REALTEK RTL8201L 0x0020 RTL8201L 10/100 media interface model xxREALTEK RTL8305SC 0x0005 RTL8305SC 10/100 802.1q switch Copied: stable/7/sys/dev/mii/rdcphy.c (from r216828, head/sys/dev/mii/rdcphy.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/7/sys/dev/mii/rdcphy.c Fri Feb 4 20:27:50 2011 (r218295, copy of r216828, head/sys/dev/mii/rdcphy.c) @@ -0,0 +1,267 @@ +/*- + * Copyright (c) 2010, Pyun YongHyeon + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +/* + * Driver for the RDC Semiconductor R6040 10/100 PHY. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include "miidevs.h" + +#include + +#include "miibus_if.h" + +static device_probe_t rdcphy_probe; +static device_attach_t rdcphy_attach; + +struct rdcphy_softc { + struct mii_softc mii_sc; + int mii_model; + int mii_link_tick; +#define RDCPHY_MANNEG_TICK 3 +}; + +static device_method_t rdcphy_methods[] = { + /* device interface */ + DEVMETHOD(device_probe, rdcphy_probe), + DEVMETHOD(device_attach, rdcphy_attach), + DEVMETHOD(device_detach, mii_phy_detach), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + KOBJMETHOD_END +}; + +static devclass_t rdcphy_devclass; + +static driver_t rdcphy_driver = { + "rdcphy", + rdcphy_methods, + sizeof(struct rdcphy_softc) +}; + +DRIVER_MODULE(rdcphy, miibus, rdcphy_driver, rdcphy_devclass, 0, 0); + +static int rdcphy_service(struct mii_softc *, struct mii_data *, int); +static void rdcphy_status(struct mii_softc *); + +static const struct mii_phydesc rdcphys[] = { + MII_PHY_DESC(RDC, R6040), + MII_PHY_END +}; + +static int +rdcphy_probe(device_t dev) +{ + + return (mii_phy_dev_probe(dev, rdcphys, BUS_PROBE_DEFAULT)); +} + +static int +rdcphy_attach(device_t dev) +{ + struct rdcphy_softc *rsc; + struct mii_softc *sc; + struct mii_attach_args *ma; + struct mii_data *mii; + + rsc = device_get_softc(dev); + sc = &rsc->mii_sc; + ma = device_get_ivars(dev); + sc->mii_dev = device_get_parent(dev); + mii = ma->mii_data; + LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); + + sc->mii_flags = miibus_get_flags(dev); + sc->mii_inst = mii->mii_instance++; + sc->mii_phy = ma->mii_phyno; + sc->mii_service = rdcphy_service; + sc->mii_pdata = mii; + + rsc->mii_model = MII_MODEL(ma->mii_id2); + if (bootverbose) + device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n", + MII_OUI(ma->mii_id1, ma->mii_id2), MII_MODEL(ma->mii_id2), + MII_REV(ma->mii_id2)); + + mii_phy_reset(sc); + + sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; + if (sc->mii_capabilities & BMSR_EXTSTAT) + sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); + device_printf(dev, " "); + mii_phy_add_media(sc); + printf("\n"); + + MIIBUS_MEDIAINIT(sc->mii_dev); + return (0); +} + +static int +rdcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) +{ + struct rdcphy_softc *rsc; + struct ifmedia_entry *ife; + + rsc = (struct rdcphy_softc *)sc; + ife = mii->mii_media.ifm_cur; + + switch (cmd) { + case MII_POLLSTAT: + break; + + case MII_MEDIACHG: + /* + * If the interface is not up, don't do anything. + */ + if ((mii->mii_ifp->if_flags & IFF_UP) == 0) + break; + + mii_phy_setmedia(sc); + switch (IFM_SUBTYPE(ife->ifm_media)) { + case IFM_100_TX: + case IFM_10_T: + /* + * Report fake lost link event to parent + * driver. This will stop MAC of parent + * driver and make it possible to reconfigure + * MAC after completion of link establishment. + * Note, the parent MAC seems to require + * restarting MAC when underlying any PHY + * configuration was changed even if the + * resolved speed/duplex was not changed at + * all. + */ + mii->mii_media_status = 0; + mii->mii_media_active = IFM_ETHER | IFM_NONE; + rsc->mii_link_tick = RDCPHY_MANNEG_TICK; + /* Immediately report link down. */ + mii_phy_update(sc, MII_MEDIACHG); + return (0); + default: + break; + } + break; + + case MII_TICK: + if (mii_phy_tick(sc) == EJUSTRETURN) + return (0); + if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { + /* + * It seems the PHY hardware does not correctly + * report link status changes when manual link + * configuration is in progress. It is also + * possible for the PHY to complete establishing + * a link within one second such that mii(4) + * did not notice the link change. To workaround + * the issue, emulate lost link event and wait + * for 3 seconds when manual link configuration + * is in progress. 3 seconds would be long + * enough to absorb transient link flips. + */ + if (rsc->mii_link_tick > 0) { + rsc->mii_link_tick--; + return (0); + } + } + break; + } + + /* Update the media status. */ + rdcphy_status(sc); + + /* Callback if something changed. */ + mii_phy_update(sc, cmd); + return (0); +} + +static void +rdcphy_status(struct mii_softc *sc) +{ + struct mii_data *mii; + struct ifmedia_entry *ife; + int bmsr, bmcr, physts; + + mii = sc->mii_pdata; + ife = mii->mii_media.ifm_cur; + + mii->mii_media_status = IFM_AVALID; + mii->mii_media_active = IFM_ETHER; + + bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); + physts = PHY_READ(sc, MII_RDCPHY_STATUS); + + if ((physts & STATUS_LINK_UP) != 0) + mii->mii_media_status |= IFM_ACTIVE; + + bmcr = PHY_READ(sc, MII_BMCR); + if ((bmcr & BMCR_ISO) != 0) { + mii->mii_media_active |= IFM_NONE; + mii->mii_media_status = 0; + return; + } + + if ((bmcr & BMCR_LOOP) != 0) + mii->mii_media_active |= IFM_LOOP; + + if ((bmcr & BMCR_AUTOEN) != 0) { + if ((bmsr & BMSR_ACOMP) == 0) { + /* Erg, still trying, I guess... */ + mii->mii_media_active |= IFM_NONE; + return; + } + } + + switch (physts & STATUS_SPEED_MASK) { + case STATUS_SPEED_100: + mii->mii_media_active |= IFM_100_TX; + break; + case STATUS_SPEED_10: + mii->mii_media_active |= IFM_10_T; + break; + default: + mii->mii_media_active |= IFM_NONE; + return; + } + if ((physts & STATUS_FULL_DUPLEX) != 0) + mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); + else + mii->mii_media_active |= IFM_HDX; +} Copied: stable/7/sys/dev/mii/rdcphyreg.h (from r216828, head/sys/dev/mii/rdcphyreg.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/7/sys/dev/mii/rdcphyreg.h Fri Feb 4 20:27:50 2011 (r218295, copy of r216828, head/sys/dev/mii/rdcphyreg.h) @@ -0,0 +1,73 @@ +/*- + * Copyright (c) 2010, Pyun YongHyeon + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_MII_RDCPHYREG_H_ +#define _DEV_MII_RDCPHYREG_H_ + +#define MII_RDCPHY_DEBUG 0x11 +#define DEBUG_JABBER_DIS 0x0040 +#define DEBUG_LOOP_BACK_10MBPS 0x0400 + +#define MII_RDCPHY_CTRL 0x14 +#define CTRL_SQE_ENB 0x0100 +#define CTRL_NEG_POLARITY 0x0400 +#define CTRL_AUTO_POLARITY 0x0800 +#define CTRL_MDIXSEL_RX 0x2000 +#define CTRL_MDIXSEL_TX 0x4000 +#define CTRL_AUTO_MDIX_DIS 0x8000 + +#define MII_RDCPHY_CTRL2 0x15 +#define CTRL2_LED_DUPLEX 0x0000 +#define CTRL2_LED_DUPLEX_COL 0x0008 +#define CTRL2_LED_ACT 0x0010 +#define CTRL2_LED_SPEED_ACT 0x0018 +#define CTRL2_LED_BLK_100MBPS_DIS 0x0020 +#define CTRL2_LED_BLK_10MBPS_DIS 0x0040 +#define CTRL2_LED_BLK_LINK_ACT_DIS 0x0080 +#define CTRL2_SDT_THRESH_MASK 0x3E00 +#define CTRL2_TIMING_ERR_SEL 0x4000 +#define CTRL2_LED_BLK_80MS 0x8000 +#define CTRL2_LED_BLK_160MS 0x0000 +#define CTRL2_LED_MASK 0x0018 + +#define MII_RDCPHY_STATUS 0x16 +#define STATUS_AUTO_MDIX_RX 0x0200 +#define STATUS_AUTO_MDIX_TX 0x0400 +#define STATUS_NEG_POLARITY 0x0800 +#define STATUS_FULL_DUPLEX 0x1000 +#define STATUS_SPEED_10 0x0000 +#define STATUS_SPEED_100 0x2000 +#define STATUS_SPEED_MASK 0x6000 +#define STATUS_LINK_UP 0x8000 + +/* Analog test register 2 */ +#define MII_RDCPHY_TEST2 0x1A +#define TEST2_PWR_DOWN 0x0200 + +#endif /* _DEV_MII_RDCPHYREG_H_ */ Modified: stable/7/sys/modules/mii/Makefile ============================================================================== --- stable/7/sys/modules/mii/Makefile Fri Feb 4 20:12:45 2011 (r218294) +++ stable/7/sys/modules/mii/Makefile Fri Feb 4 20:27:50 2011 (r218295) @@ -7,8 +7,8 @@ SRCS= acphy.c amphy.c atphy.c bmtphy.c b SRCS+= e1000phy.c exphy.c gentbi.c icsphy.c inphy.c ip1000phy.c jmphy.c SRCS+= lxtphy.c miibus_if.c miibus_if.h mii.c miidevs.h mii_physubr.c SRCS+= mlphy.c nsgphy.c nsphy.c nsphyter.c pci_if.h pnaphy.c qsphy.c -SRCS+= rgephy.c rlphy.c ruephy.c tdkphy.c tlphy.c truephy.c ukphy.c -SRCS+= ukphy_subr.c +SRCS+= rdcphy.c rgephy.c rlphy.c ruephy.c tdkphy.c tlphy.c truephy.c +SRCS+= ukphy.c ukphy_subr.c SRCS+= xmphy.c EXPORT_SYMS= mii_attach \