From owner-svn-src-all@freebsd.org Thu Apr 7 06:36:04 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id B9177B0754D; Thu, 7 Apr 2016 06:36:04 +0000 (UTC) (envelope-from sephe@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 717491F1C; Thu, 7 Apr 2016 06:36:04 +0000 (UTC) (envelope-from sephe@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u376a3tF059696; Thu, 7 Apr 2016 06:36:03 GMT (envelope-from sephe@FreeBSD.org) Received: (from sephe@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u376a3JA059695; Thu, 7 Apr 2016 06:36:03 GMT (envelope-from sephe@FreeBSD.org) Message-Id: <201604070636.u376a3JA059695@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: sephe set sender to sephe@FreeBSD.org using -f From: Sepherosa Ziehau Date: Thu, 7 Apr 2016 06:36:03 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r297638 - head/sys/x86/x86 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Apr 2016 06:36:04 -0000 Author: sephe Date: Thu Apr 7 06:36:03 2016 New Revision: 297638 URL: https://svnweb.freebsd.org/changeset/base/297638 Log: x86: Allow interrupt vector allocation/free even on UP It is needed by the hypervisor FreeBSD guest to allocate/free private interrupt vectors. Reviewed by: kib, jhb, Dexuan Cui Sponsored by: Microsoft OSTC Differential Revision: https://reviews.freebsd.org/D5849 Modified: head/sys/x86/x86/local_apic.c Modified: head/sys/x86/x86/local_apic.c ============================================================================== --- head/sys/x86/x86/local_apic.c Thu Apr 7 06:21:33 2016 (r297637) +++ head/sys/x86/x86/local_apic.c Thu Apr 7 06:36:03 2016 (r297638) @@ -321,9 +321,9 @@ static int native_lapic_set_lvt_trigger static void native_lapic_ipi_raw(register_t icrlo, u_int dest); static void native_lapic_ipi_vectored(u_int vector, int dest); static int native_lapic_ipi_wait(int delay); +#endif /* SMP */ static int native_lapic_ipi_alloc(inthand_t *ipifunc); static void native_lapic_ipi_free(int vector); -#endif /* SMP */ struct apic_ops apic_ops = { .create = native_lapic_create, @@ -350,9 +350,9 @@ struct apic_ops apic_ops = { .ipi_raw = native_lapic_ipi_raw, .ipi_vectored = native_lapic_ipi_vectored, .ipi_wait = native_lapic_ipi_wait, +#endif .ipi_alloc = native_lapic_ipi_alloc, .ipi_free = native_lapic_ipi_free, -#endif .set_lvt_mask = native_lapic_set_lvt_mask, .set_lvt_mode = native_lapic_set_lvt_mode, .set_lvt_polarity = native_lapic_set_lvt_polarity, @@ -1904,6 +1904,8 @@ native_lapic_ipi_vectored(u_int vector, #endif /* DETECT_DEADLOCK */ } +#endif /* SMP */ + /* * Since the IDT is shared by all CPUs the IPI slot update needs to be globally * visible. @@ -1958,5 +1960,3 @@ native_lapic_ipi_free(int vector) setidt(vector, &IDTVEC(rsvd), SDT_APICT, SEL_KPL, GSEL_APIC); mtx_unlock_spin(&icu_lock); } - -#endif /* SMP */