From owner-svn-src-head@freebsd.org Thu Feb 25 14:26:15 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 2B3DDAB30C2; Thu, 25 Feb 2016 14:26:15 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 0A4181BE9; Thu, 25 Feb 2016 14:26:14 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u1PEQEoK063595; Thu, 25 Feb 2016 14:26:14 GMT (envelope-from zbb@FreeBSD.org) Received: (from zbb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u1PEQDCR063592; Thu, 25 Feb 2016 14:26:13 GMT (envelope-from zbb@FreeBSD.org) Message-Id: <201602251426.u1PEQDCR063592@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: zbb set sender to zbb@FreeBSD.org using -f From: Zbigniew Bodek Date: Thu, 25 Feb 2016 14:26:13 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r296037 - head/sys/dev/vnic X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Feb 2016 14:26:15 -0000 Author: zbb Date: Thu Feb 25 14:26:13 2016 New Revision: 296037 URL: https://svnweb.freebsd.org/changeset/base/296037 Log: Fix VNIC support for Pass2.0 ThunderX chips - Check chip revision using pass1_silicon() routine. - Configure CPI correctly for Pass2.0 Reviewed by: wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5422 Modified: head/sys/dev/vnic/nic.h head/sys/dev/vnic/nic_main.c head/sys/dev/vnic/nic_reg.h Modified: head/sys/dev/vnic/nic.h ============================================================================== --- head/sys/dev/vnic/nic.h Thu Feb 25 14:24:32 2016 (r296036) +++ head/sys/dev/vnic/nic.h Thu Feb 25 14:26:13 2016 (r296037) @@ -42,6 +42,9 @@ #define PCI_CFG_REG_BAR_NUM 0 #define PCI_MSIX_REG_BAR_NUM 4 +/* PCI revision IDs */ +#define PCI_REVID_PASS2 8 + /* NIC SRIOV VF count */ #define MAX_NUM_VFS_SUPPORTED 128 #define DEFAULT_NUM_VF_ENABLED 8 @@ -483,6 +486,14 @@ nic_get_node_id(struct resource *res) return ((addr >> NIC_NODE_ID_SHIFT) & NIC_NODE_ID_MASK); } +static __inline boolean_t +pass1_silicon(device_t dev) +{ + + /* Check if the chip revision is < Pass2 */ + return (pci_get_revid(dev) < PCI_REVID_PASS2); +} + int nicvf_send_msg_to_pf(struct nicvf *vf, union nic_mbx *mbx); #endif /* NIC_H */ Modified: head/sys/dev/vnic/nic_main.c ============================================================================== --- head/sys/dev/vnic/nic_main.c Thu Feb 25 14:24:32 2016 (r296036) +++ head/sys/dev/vnic/nic_main.c Thu Feb 25 14:26:13 2016 (r296037) @@ -87,7 +87,6 @@ struct nicvf_info { struct nicpf { device_t dev; - uint8_t rev_id; uint8_t node; u_int flags; uint8_t num_vf_en; /* No of VF enabled */ @@ -200,7 +199,6 @@ nicpf_attach(device_t dev) } nic->node = nic_get_node_id(nic->reg_base); - nic->rev_id = pci_read_config(dev, PCIR_REVID, 1); /* Enable Traffic Network Switch (TNS) bypass mode by default */ nic->flags &= ~NIC_TNS_ENABLED; @@ -416,7 +414,7 @@ nic_send_msg_to_vf(struct nicpf *nic, in * when PF writes to MBOX(1), in next revisions when * PF writes to MBOX(0) */ - if (nic->rev_id == 0) { + if (pass1_silicon(nic->dev)) { nic_reg_write(nic, mbx_addr + 0, msg[0]); nic_reg_write(nic, mbx_addr + 8, msg[1]); } else { @@ -729,8 +727,17 @@ nic_config_cpi(struct nicpf *nic, struct padd = cpi % 8; /* 3 bits CS out of 6bits DSCP */ /* Leave RSS_SIZE as '0' to disable RSS */ - nic_reg_write(nic, NIC_PF_CPI_0_2047_CFG | (cpi << 3), - (vnic << 24) | (padd << 16) | (rssi_base + rssi)); + if (pass1_silicon(nic->dev)) { + nic_reg_write(nic, NIC_PF_CPI_0_2047_CFG | (cpi << 3), + (vnic << 24) | (padd << 16) | (rssi_base + rssi)); + } else { + /* Set MPI_ALG to '0' to disable MCAM parsing */ + nic_reg_write(nic, NIC_PF_CPI_0_2047_CFG | (cpi << 3), + (padd << 16)); + /* MPI index is same as CPI if MPI_ALG is not enabled */ + nic_reg_write(nic, NIC_PF_MPI_0_2047_CFG | (cpi << 3), + (vnic << 24) | (rssi_base + rssi)); + } if ((rssi + 1) >= cfg->rq_cnt) continue; Modified: head/sys/dev/vnic/nic_reg.h ============================================================================== --- head/sys/dev/vnic/nic_reg.h Thu Feb 25 14:24:32 2016 (r296036) +++ head/sys/dev/vnic/nic_reg.h Thu Feb 25 14:26:13 2016 (r296037) @@ -107,6 +107,7 @@ #define NIC_PF_ECC3_DBE_ENA_W1C (0x2710) #define NIC_PF_ECC3_DBE_ENA_W1S (0x2718) #define NIC_PF_CPI_0_2047_CFG (0x200000) +#define NIC_PF_MPI_0_2047_CFG (0x210000) #define NIC_PF_RSSI_0_4097_RQ (0x220000) #define NIC_PF_LMAC_0_7_CFG (0x240000) #define NIC_PF_LMAC_0_7_SW_XOFF (0x242000)