From owner-svn-src-all@FreeBSD.ORG Thu Mar 20 05:10:18 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 61FA1AE7; Thu, 20 Mar 2014 05:10:18 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 35F14F9A; Thu, 20 Mar 2014 05:10:18 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s2K5AIjg035656; Thu, 20 Mar 2014 05:10:18 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s2K5AIj5035655; Thu, 20 Mar 2014 05:10:18 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201403200510.s2K5AIj5035655@svn.freebsd.org> From: Adrian Chadd Date: Thu, 20 Mar 2014 05:10:18 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r263418 - head/sys/dev/ath X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 Mar 2014 05:10:18 -0000 Author: adrian Date: Thu Mar 20 05:10:17 2014 New Revision: 263418 URL: http://svnweb.freebsd.org/changeset/base/263418 Log: Add some debugging code to print out if registers are touched whilst the device is asleep. This doesn't avoid logging errors for things that are actually OK to access whilst the chip is asleep (eg, the RTC registers (0x7000->0x70ff on the AR5416 and later.) But, this is a pretty good indicator if things are accessed incorrectly. Tested: * AR5416, STA Modified: head/sys/dev/ath/ah_osdep.c Modified: head/sys/dev/ath/ah_osdep.c ============================================================================== --- head/sys/dev/ath/ah_osdep.c Thu Mar 20 05:08:31 2014 (r263417) +++ head/sys/dev/ath/ah_osdep.c Thu Mar 20 05:10:17 2014 (r263418) @@ -253,6 +253,12 @@ ath_hal_reg_write(struct ath_hal *ah, u_ bus_space_tag_t tag = BUSTAG(ah); bus_space_handle_t h = ah->ah_sh; + /* Debug - complain if we haven't fully waken things up */ + if (ah->ah_powerMode != HAL_PM_AWAKE) { + ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", + __func__, reg, val, ah->ah_powerMode); + } + if (ath_hal_alq) { struct ale *ale = ath_hal_alq_get(ah); if (ale) { @@ -278,6 +284,12 @@ ath_hal_reg_read(struct ath_hal *ah, u_i bus_space_handle_t h = ah->ah_sh; u_int32_t val; + /* Debug - complain if we haven't fully waken things up */ + if (ah->ah_powerMode != HAL_PM_AWAKE) { + ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", + __func__, reg, ah->ah_powerMode); + } + if (ah->ah_config.ah_serialise_reg_war) mtx_lock_spin(&ah_regser_mtx); val = bus_space_read_4(tag, h, reg); @@ -330,6 +342,12 @@ ath_hal_reg_write(struct ath_hal *ah, u_ bus_space_tag_t tag = BUSTAG(ah); bus_space_handle_t h = ah->ah_sh; + /* Debug - complain if we haven't fully waken things up */ + if (ah->ah_powerMode != HAL_PM_AWAKE) { + ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", + __func__, reg, val, ah->ah_powerMode); + } + if (ah->ah_config.ah_serialise_reg_war) mtx_lock_spin(&ah_regser_mtx); bus_space_write_4(tag, h, reg, val); @@ -344,6 +362,12 @@ ath_hal_reg_read(struct ath_hal *ah, u_i bus_space_handle_t h = ah->ah_sh; u_int32_t val; + /* Debug - complain if we haven't fully waken things up */ + if (ah->ah_powerMode != HAL_PM_AWAKE) { + ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", + __func__, reg, ah->ah_powerMode); + } + if (ah->ah_config.ah_serialise_reg_war) mtx_lock_spin(&ah_regser_mtx); val = bus_space_read_4(tag, h, reg);