From owner-cvs-all@FreeBSD.ORG Wed Apr 16 16:39:07 2008 Return-Path: Delivered-To: cvs-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 911C5106567C; Wed, 16 Apr 2008 16:39:07 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from smtpoutm.mac.com (smtpoutm.mac.com [17.148.16.68]) by mx1.freebsd.org (Postfix) with ESMTP id 7B6808FC43; Wed, 16 Apr 2008 16:39:07 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from mac.com (asmtp008-s [10.150.69.71]) by smtpoutm.mac.com (Xserve/smtpout005/MantshX 4.0) with ESMTP id m3GGd7ek022058; Wed, 16 Apr 2008 09:39:07 -0700 (PDT) Received: from macbook-pro.jnpr.net (natint3.juniper.net [66.129.224.36]) (authenticated bits=0) by mac.com (Xserve/asmtp008/MantshX 4.0) with ESMTP id m3GGctsr004397 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Wed, 16 Apr 2008 09:38:58 -0700 (PDT) Message-Id: <46D21F70-BEC7-4627-97D4-1DE71D0BEAD2@mac.com> From: Marcel Moolenaar To: John Baldwin In-Reply-To: <200804160940.56271.jhb@freebsd.org> Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit Mime-Version: 1.0 (Apple Message framework v919.2) Date: Wed, 16 Apr 2008 09:38:53 -0700 References: <200804142034.m3EKYjfs059229@repoman.freebsd.org> <200804160940.56271.jhb@freebsd.org> X-Mailer: Apple Mail (2.919.2) Cc: cvs-src@freebsd.org, src-committers@freebsd.org, cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/ia64/ia64 sapic.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Apr 2008 16:39:07 -0000 On Apr 16, 2008, at 6:40 AM, John Baldwin wrote: > On Monday 14 April 2008 04:34:45 pm Marcel Moolenaar wrote: >> marcel 2008-04-14 20:34:45 UTC >> >> FreeBSD src repository >> >> Modified files: >> sys/ia64/ia64 sapic.c >> Log: >> Revision 1.9 changes the delivery mode from the magic constant 0 >> (i.e. fixed delivery) to SAPIC_DELMODE_LOWPRI. While the commit >> log doesn't mention the change in behaviour, it is believed to be >> deliberate. In the last 5.5 years this hasn't been a problem. Nor >> do I think did it make any difference, but who knows. However, I >> do know that it break SMP support for Montecito-based machines. >> Switch back to fixed-CPU delivery so that SMP works again. This >> gives me some time to look more closely at the problem, as well >> as make sure the I-cache validation as it's implemented currently >> is sufficient in SMP configurations... > > Intel is deprecating the LOWPRI delivery mode on x86 CPUs with > x2APIC, so I > think it is probably best to switch to using FIXED mode on ia64 as > well (x86 > has used fixed mode since the new APIC code came in due to LOWPRI > being > effectively useless on P4 CPUs). That's good to know. If LOWPRI has the same destiny in Itanium chipsets as it has in Pentium chipsets, then I might as well avoid the hassle of getting it to work. Though, I do like it when all CPUs share in the interrupt handling. Maybe I can do that more easily with MSI (which I still need to implement :-) Thanks, -- Marcel Moolenaar xcllnt@mac.com