From owner-svn-src-stable-7@FreeBSD.ORG Wed Nov 4 18:03:19 2009 Return-Path: Delivered-To: svn-src-stable-7@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B82791065670; Wed, 4 Nov 2009 18:03:19 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A5B5F8FC08; Wed, 4 Nov 2009 18:03:19 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id nA4I3J54041045; Wed, 4 Nov 2009 18:03:19 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id nA4I3JuB041043; Wed, 4 Nov 2009 18:03:19 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <200911041803.nA4I3JuB041043@svn.freebsd.org> From: Pyun YongHyeon Date: Wed, 4 Nov 2009 18:03:19 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r198912 - stable/7/sys/dev/fxp X-BeenThere: svn-src-stable-7@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for only the 7-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Nov 2009 18:03:19 -0000 Author: yongari Date: Wed Nov 4 18:03:19 2009 New Revision: 198912 URL: http://svn.freebsd.org/changeset/base/198912 Log: MFC r193875: Controller will dma SCB command status for a given command and driver should read updated status back after issuing a SCB command. To send a command to controller and read updated status back, driver should synchronize both memory read and write operations with device. Fix bus_dmamap_sync operation specifier used in fxp_dma_wait() by adding both memory read and memory write operations. Modified: stable/7/sys/dev/fxp/if_fxp.c Directory Properties: stable/7/sys/ (props changed) stable/7/sys/contrib/pf/ (props changed) Modified: stable/7/sys/dev/fxp/if_fxp.c ============================================================================== --- stable/7/sys/dev/fxp/if_fxp.c Wed Nov 4 17:30:48 2009 (r198911) +++ stable/7/sys/dev/fxp/if_fxp.c Wed Nov 4 18:03:19 2009 (r198912) @@ -348,12 +348,14 @@ static void fxp_dma_wait(struct fxp_softc *sc, volatile uint16_t *status, bus_dma_tag_t dmat, bus_dmamap_t map) { - int i = 10000; + int i; - bus_dmamap_sync(dmat, map, BUS_DMASYNC_POSTREAD); - while (!(le16toh(*status) & FXP_CB_STATUS_C) && --i) { + for (i = 10000; i > 0; i--) { DELAY(2); - bus_dmamap_sync(dmat, map, BUS_DMASYNC_POSTREAD); + bus_dmamap_sync(dmat, map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + if ((le16toh(*status) & FXP_CB_STATUS_C) != 0) + break; } if (i == 0) device_printf(sc->dev, "DMA timeout\n"); @@ -2222,13 +2224,12 @@ fxp_init_body(struct fxp_softc *sc) * Start the multicast setup command. */ fxp_scb_wait(sc); - bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, BUS_DMASYNC_PREWRITE); + bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); /* ...and wait for it to complete. */ fxp_dma_wait(sc, &mcsp->cb_status, sc->mcs_tag, sc->mcs_map); - bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, - BUS_DMASYNC_POSTWRITE); } /* @@ -2336,12 +2337,12 @@ fxp_init_body(struct fxp_softc *sc) * Start the config command/DMA. */ fxp_scb_wait(sc); - bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); + bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); /* ...and wait for it to complete. */ fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); - bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); /* * Now initialize the station address. Temporarily use the TxCB @@ -2357,11 +2358,11 @@ fxp_init_body(struct fxp_softc *sc) * Start the IAS (Individual Address Setup) command/DMA. */ fxp_scb_wait(sc); - bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); + bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); /* ...and wait for it to complete. */ fxp_dma_wait(sc, &cb_ias->cb_status, sc->cbl_tag, sc->cbl_map); - bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); /* * Initialize transmit control block (TxCB) list. @@ -3006,12 +3007,12 @@ fxp_load_ucode(struct fxp_softc *sc) * Download the ucode to the chip. */ fxp_scb_wait(sc); - bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); + bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); /* ...and wait for it to complete. */ fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); - bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); device_printf(sc->dev, "Microcode loaded, int_delay: %d usec bundle_max: %d\n", sc->tunable_int_delay,