From owner-svn-src-all@FreeBSD.ORG Sat Apr 28 03:07:37 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 7EA8E106564A; Sat, 28 Apr 2012 03:07:37 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 5FDAE8FC15; Sat, 28 Apr 2012 03:07:37 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q3S37bod038964; Sat, 28 Apr 2012 03:07:37 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q3S37bTn038960; Sat, 28 Apr 2012 03:07:37 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201204280307.q3S37bTn038960@svn.freebsd.org> From: Adrian Chadd Date: Sat, 28 Apr 2012 03:07:37 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r234747 - head/sys/dev/ath/ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 28 Apr 2012 03:07:37 -0000 Author: adrian Date: Sat Apr 28 03:07:36 2012 New Revision: 234747 URL: http://svn.freebsd.org/changeset/base/234747 Log: Add an AR5416 PCU DMA stop method, as a check for the AR9130 is needed. The reference driver has a 3ms delay for the AR9130 but I'm not as yet sure why. From what I can gather, it's likely waiting for some FIFO flush to occur. At some point in the future it may be worthwhile adding a WMAC FIFO flush here, but that'd require some side-call through to the SoC DDR flush routines. Obtained from: Atheros Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416.h head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c head/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416.h ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416.h Sat Apr 28 02:48:51 2012 (r234746) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416.h Sat Apr 28 03:07:36 2012 (r234747) @@ -234,6 +234,7 @@ extern HAL_BOOL ar5416SetKeyCacheEntry(s extern uint32_t ar5416GetRxFilter(struct ath_hal *ah); extern void ar5416SetRxFilter(struct ath_hal *ah, uint32_t bits); +extern HAL_BOOL ar5416StopDmaReceive(struct ath_hal *ah); extern void ar5416StartPcuReceive(struct ath_hal *ah); extern void ar5416StopPcuReceive(struct ath_hal *ah); extern HAL_BOOL ar5416SetupRxDesc(struct ath_hal *, Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Sat Apr 28 02:48:51 2012 (r234746) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Sat Apr 28 03:07:36 2012 (r234747) @@ -119,6 +119,7 @@ ar5416InitState(struct ath_hal_5416 *ahp /* Receive Functions */ ah->ah_getRxFilter = ar5416GetRxFilter; ah->ah_setRxFilter = ar5416SetRxFilter; + ah->ah_stopDmaReceive = ar5416StopDmaReceive; ah->ah_startPcuReceive = ar5416StartPcuReceive; ah->ah_stopPcuReceive = ar5416StopPcuReceive; ah->ah_setupRxDesc = ar5416SetupRxDesc; Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c Sat Apr 28 02:48:51 2012 (r234746) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c Sat Apr 28 03:07:36 2012 (r234747) @@ -67,6 +67,40 @@ ar5416SetRxFilter(struct ath_hal *ah, u_ } /* + * Stop Receive at the DMA engine + */ +HAL_BOOL +ar5416StopDmaReceive(struct ath_hal *ah) +{ + HAL_BOOL status; + + OS_MARK(ah, AH_MARK_RX_CTL, AH_MARK_RX_CTL_DMA_STOP); + OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ + if (!ath_hal_wait(ah, AR_CR, AR_CR_RXE, 0)) { + OS_MARK(ah, AH_MARK_RX_CTL, AH_MARK_RX_CTL_DMA_STOP_ERR); +#ifdef AH_DEBUG + ath_hal_printf(ah, "%s: dma failed to stop in 10ms\n" + "AR_CR=0x%08x\nAR_DIAG_SW=0x%08x\n", + __func__, + OS_REG_READ(ah, AR_CR), + OS_REG_READ(ah, AR_DIAG_SW)); +#endif + status = AH_FALSE; + } else { + status = AH_TRUE; + } + + /* + * XXX Is this to flush whatever is in a FIFO somewhere? + * XXX If so, what should the correct behaviour should be? + */ + if (AR_SREV_9100(ah)) + OS_DELAY(3000); + + return (status); +} + +/* * Start receive at the PCU engine */ void