From owner-svn-src-head@FreeBSD.ORG Sat Sep 18 16:57:06 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2E6EA106566B; Sat, 18 Sep 2010 16:57:06 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 03C768FC0A; Sat, 18 Sep 2010 16:57:06 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o8IGv5l6071868; Sat, 18 Sep 2010 16:57:05 GMT (envelope-from mav@svn.freebsd.org) Received: (from mav@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o8IGv5Kw071864; Sat, 18 Sep 2010 16:57:05 GMT (envelope-from mav@svn.freebsd.org) Message-Id: <201009181657.o8IGv5Kw071864@svn.freebsd.org> From: Alexander Motin Date: Sat, 18 Sep 2010 16:57:05 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r212825 - in head/sys/arm: arm include X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 18 Sep 2010 16:57:06 -0000 Author: mav Date: Sat Sep 18 16:57:05 2010 New Revision: 212825 URL: http://svn.freebsd.org/changeset/base/212825 Log: Add basic cpu_sleep() support for Marvell SoCs. This drops my SheevaPlug's heatsink termperature in open air from 49C to 43C when idle. Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/arm/cpufunc_asm_sheeva.S head/sys/arm/include/cpufunc.h Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Sat Sep 18 15:03:31 2010 (r212824) +++ head/sys/arm/arm/cpufunc.c Sat Sep 18 16:57:05 2010 (r212825) @@ -397,7 +397,7 @@ struct cpu_functions sheeva_cpufuncs = { cpufunc_nullop, /* flush_brnchtgt_C */ (void *)cpufunc_nullop, /* flush_brnchtgt_E */ - (void *)cpufunc_nullop, /* sleep */ + sheeva_cpu_sleep, /* sleep */ /* Soft functions */ @@ -1076,6 +1076,9 @@ set_cpufuncs() FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN | FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN); } + + /* Use powersave on this CPU. */ + cpu_do_powersave = 1; } else cpufuncs = armv5_ec_cpufuncs; Modified: head/sys/arm/arm/cpufunc_asm_sheeva.S ============================================================================== --- head/sys/arm/arm/cpufunc_asm_sheeva.S Sat Sep 18 15:03:31 2010 (r212824) +++ head/sys/arm/arm/cpufunc_asm_sheeva.S Sat Sep 18 16:57:05 2010 (r212825) @@ -392,3 +392,10 @@ ENTRY(sheeva_control_ext) mcrne p15, 1, r2, c15, c1, 0 /* Write new control register */ mov r0, r3 /* Return old value */ RET + +ENTRY(sheeva_cpu_sleep) + mov r0, #0 + mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */ + mcr p15, 0, r0, c7, c0, 4 /* Wait for interrupt */ + mov pc, lr + Modified: head/sys/arm/include/cpufunc.h ============================================================================== --- head/sys/arm/include/cpufunc.h Sat Sep 18 15:03:31 2010 (r212824) +++ head/sys/arm/include/cpufunc.h Sat Sep 18 16:57:05 2010 (r212825) @@ -400,6 +400,7 @@ extern unsigned arm10_dcache_index_max; extern unsigned arm10_dcache_index_inc; u_int sheeva_control_ext (u_int, u_int); +void sheeva_cpu_sleep (int); void sheeva_setttb (u_int); void sheeva_dcache_wbinv_range (vm_offset_t, vm_size_t); void sheeva_dcache_inv_range (vm_offset_t, vm_size_t);