From owner-svn-src-head@FreeBSD.ORG Wed May 14 11:32:16 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 5CBC1A12; Wed, 14 May 2014 11:32:16 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 49C192661; Wed, 14 May 2014 11:32:16 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s4EBWGnE086899; Wed, 14 May 2014 11:32:16 GMT (envelope-from hselasky@svn.freebsd.org) Received: (from hselasky@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s4EBWGeX086898; Wed, 14 May 2014 11:32:16 GMT (envelope-from hselasky@svn.freebsd.org) Message-Id: <201405141132.s4EBWGeX086898@svn.freebsd.org> From: Hans Petter Selasky Date: Wed, 14 May 2014 11:32:16 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r266012 - head/sys/dev/usb/controller X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 May 2014 11:32:16 -0000 Author: hselasky Date: Wed May 14 11:32:15 2014 New Revision: 266012 URL: http://svnweb.freebsd.org/changeset/base/266012 Log: Disable configuration of the host frame interval register until further, hence it breaks USB support on some non-RPI platforms. Modified: head/sys/dev/usb/controller/dwc_otg.c Modified: head/sys/dev/usb/controller/dwc_otg.c ============================================================================== --- head/sys/dev/usb/controller/dwc_otg.c Wed May 14 11:25:59 2014 (r266011) +++ head/sys/dev/usb/controller/dwc_otg.c Wed May 14 11:32:15 2014 (r266012) @@ -350,6 +350,12 @@ dwc_otg_init_fifo(struct dwc_otg_softc * static void dwc_otg_update_host_frame_interval(struct dwc_otg_softc *sc) { + + /* + * Disabled until further. Assuming that the register is already + * programmed correctly by the boot loader. + */ +#if 0 uint32_t temp; /* setup HOST frame interval register, based on existing value */ @@ -375,6 +381,7 @@ dwc_otg_update_host_frame_interval(struc DPRINTF("HFIR=0x%08x\n", temp); DWC_OTG_WRITE_4(sc, DOTG_HFIR, temp); +#endif } static void