From owner-p4-projects@FreeBSD.ORG Tue Oct 19 20:23:06 2004 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 6684216A4D2; Tue, 19 Oct 2004 20:23:06 +0000 (GMT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 2A83E16A4D0 for ; Tue, 19 Oct 2004 20:23:06 +0000 (GMT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 058FC43D48 for ; Tue, 19 Oct 2004 20:23:06 +0000 (GMT) (envelope-from jhb@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.11/8.12.11) with ESMTP id i9JKN52e092749 for ; Tue, 19 Oct 2004 20:23:05 GMT (envelope-from jhb@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.11/8.12.11/Submit) id i9JKN5Na092746 for perforce@freebsd.org; Tue, 19 Oct 2004 20:23:05 GMT (envelope-from jhb@freebsd.org) Date: Tue, 19 Oct 2004 20:23:05 GMT Message-Id: <200410192023.i9JKN5Na092746@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jhb@freebsd.org using -f From: John Baldwin To: Perforce Change Reviews Subject: PERFORCE change 63381 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 Oct 2004 20:23:07 -0000 http://perforce.freebsd.org/chv.cgi?CH=63381 Change 63381 by jhb@jhb_tibook on 2004/10/19 20:22:10 Use fences on amd64 for memory barriers (untested). Affected files ... .. //depot/projects/smpng/sys/amd64/include/atomic.h#4 edit Differences ... ==== //depot/projects/smpng/sys/amd64/include/atomic.h#4 (text+ko) ==== @@ -162,30 +162,22 @@ #if defined(__GNUC__) -#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ +#define ATOMIC_STORE_LOAD(TYPE) \ static __inline u_##TYPE \ atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ { \ - u_##TYPE res; \ + u_##TYPE v; \ \ - __asm __volatile(__XSTRING(MPLOCKED) LOP \ - : "=a" (res), /* 0 (result) */\ - "+m" (*p) /* 1 */ \ - : : "memory"); \ - \ - return (res); \ + v = *p; \ + __asm __volatile("lfence" ::: "memory"); \ + return (v); \ } \ \ -/* \ - * The XCHG instruction asserts LOCK automagically. \ - */ \ static __inline void \ atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ { \ - __asm __volatile(SOP \ - : "+m" (*p), /* 0 */ \ - "+r" (v) /* 1 */ \ - : : "memory"); \ + __asm __volatile("sfence" ::: "memory"); \ + *p = v; \ } \ struct __hack @@ -194,7 +186,7 @@ extern int atomic_cmpset_int(volatile u_int *, u_int, u_int); extern int atomic_cmpset_long(volatile u_long *, u_long, u_long); -#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ +#define ATOMIC_STORE_LOAD(TYPE) \ extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \ extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) @@ -222,10 +214,10 @@ ATOMIC_ASM(add, long, "addq %1,%0", "ir", v); ATOMIC_ASM(subtract, long, "subq %1,%0", "ir", v); -ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0"); -ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0"); -ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0"); -ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0"); +ATOMIC_STORE_LOAD(char); +ATOMIC_STORE_LOAD(short); +ATOMIC_STORE_LOAD(int); +ATOMIC_STORE_LOAD(long); #undef ATOMIC_ASM #undef ATOMIC_STORE_LOAD