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From: Anton Yuzhaninov <citrin@citrin.ru>
Date: Wed, 21 Sep 2011 05:48:46 +0000 (UTC)
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Subject: Re: hwpmc overflow
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On Wed, 21 Sep 2011 09:27:33 +0800, Adrian Chadd wrote:
AC> Is this an AMD class CPU?
AC> 
AC> The way the counters work on some platforms is that they count _up_ to
AC> an overflow value, trigger the overflow interrupt, and PMC then is
AC> supposed to calculate what the original value was.
AC> It sounds like maybe that isn't working correctly for a certain class
AC> of counters?

CPU: Intel(R) Xeon(R) CPU E5645 @ 2.40GHz

-- 
 Anton Yuzhaninov