From owner-svn-src-head@FreeBSD.ORG Mon Dec 31 22:48:54 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id E8395272; Mon, 31 Dec 2012 22:48:54 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id CCD958FC08; Mon, 31 Dec 2012 22:48:54 +0000 (UTC) Received: from svn.freebsd.org (svn.FreeBSD.org [8.8.178.70]) by svn.freebsd.org (8.14.5/8.14.5) with ESMTP id qBVMmscG023402; Mon, 31 Dec 2012 22:48:54 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.5/8.14.5/Submit) id qBVMmslr023401; Mon, 31 Dec 2012 22:48:54 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201212312248.qBVMmslr023401@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Mon, 31 Dec 2012 22:48:54 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r244916 - head/sys/boot/fdt/dts X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 31 Dec 2012 22:48:55 -0000 Author: gonzo Date: Mon Dec 31 22:48:54 2012 New Revision: 244916 URL: http://svnweb.freebsd.org/changeset/base/244916 Log: Add interrupt for PL310 controller Modified: head/sys/boot/fdt/dts/pandaboard.dts Modified: head/sys/boot/fdt/dts/pandaboard.dts ============================================================================== --- head/sys/boot/fdt/dts/pandaboard.dts Mon Dec 31 21:54:43 2012 (r244915) +++ head/sys/boot/fdt/dts/pandaboard.dts Mon Dec 31 22:48:54 2012 (r244916) @@ -67,6 +67,8 @@ pl310@48242000 { compatible = "arm,pl310"; reg = < 0x48242000 0x1000 >; + interrupts = < 32 >; + interrupt-parent = < &GIC >; }; mp_tmr@48240200 { compatible = "arm,mpcore-timers";