From owner-svn-src-all@FreeBSD.ORG Fri Feb 28 00:23:05 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 43A1CF4E; Fri, 28 Feb 2014 00:23:05 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 15F5F17A8; Fri, 28 Feb 2014 00:23:05 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s1S0N4uD068341; Fri, 28 Feb 2014 00:23:04 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s1S0N4lp068340; Fri, 28 Feb 2014 00:23:04 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201402280023.s1S0N4lp068340@svn.freebsd.org> From: Ian Lepore Date: Fri, 28 Feb 2014 00:23:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r262584 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Feb 2014 00:23:05 -0000 Author: ian Date: Fri Feb 28 00:23:04 2014 New Revision: 262584 URL: http://svnweb.freebsd.org/changeset/base/262584 Log: Supply a DELAY() implementation via weak linkage, so that SoC-specific code can supply a better implementation. A SoC with variable CPU frequency is likely to use a fixed-frequency timer for DELAY() (but still use the mpcore private timers as eventtimers). Also remove spaces from the eventtimer and timecounter names. Modified: head/sys/arm/arm/mpcore_timer.c Modified: head/sys/arm/arm/mpcore_timer.c ============================================================================== --- head/sys/arm/arm/mpcore_timer.c Fri Feb 28 00:17:03 2014 (r262583) +++ head/sys/arm/arm/mpcore_timer.c Fri Feb 28 00:23:04 2014 (r262584) @@ -129,12 +129,12 @@ uint32_t platform_arm_tmr_freq = 0; static timecounter_get_t arm_tmr_get_timecount; static struct timecounter arm_tmr_timecount = { - .tc_name = "ARM MPCore Timecounter", + .tc_name = "MPCore", .tc_get_timecount = arm_tmr_get_timecount, .tc_poll_pps = NULL, .tc_counter_mask = ~0u, .tc_frequency = 0, - .tc_quality = 1000, + .tc_quality = 800, }; /** @@ -254,7 +254,7 @@ arm_tmr_probe(device_t dev) if (!ofw_bus_is_compatible(dev, "arm,mpcore-timers")) return (ENXIO); - device_set_desc(dev, "ARM Generic MPCore Timers"); + device_set_desc(dev, "ARM MPCore Timers"); return (BUS_PROBE_DEFAULT); } @@ -327,7 +327,7 @@ arm_tmr_attach(device_t dev) return (ENXIO); } - sc->et.et_name = "ARM MPCore Eventtimer"; + sc->et.et_name = "MPCore"; sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | ET_FLAGS_PERCPU; sc->et.et_quality = 1000; @@ -369,8 +369,8 @@ DRIVER_MODULE(mp_tmr, simplebus, arm_tmr * RETURNS: * nothing */ -void -DELAY(int usec) +static void +arm_tmr_DELAY(int usec) { int32_t counts_per_usec; int32_t counts; @@ -408,3 +408,11 @@ DELAY(int usec) first = last; } } + +/* + * Supply a DELAY() implementation via weak linkage. A platform may want to use + * the mpcore per-cpu eventtimers but provide its own DELAY() routine, + * especially when the core frequency can change on the fly. + */ +__weak_reference(arm_tmr_DELAY, DELAY); +