From owner-svn-src-all@FreeBSD.ORG Fri Feb 28 00:41:56 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 2E9D3AB8; Fri, 28 Feb 2014 00:41:56 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 014B9194C; Fri, 28 Feb 2014 00:41:56 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s1S0ftJ8077574; Fri, 28 Feb 2014 00:41:55 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s1S0ftkN077569; Fri, 28 Feb 2014 00:41:55 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201402280041.s1S0ftkN077569@svn.freebsd.org> From: Ian Lepore Date: Fri, 28 Feb 2014 00:41:55 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r262587 - in head/sys/arm: arm include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Feb 2014 00:41:56 -0000 Author: ian Date: Fri Feb 28 00:41:55 2014 New Revision: 262587 URL: http://svnweb.freebsd.org/changeset/base/262587 Log: Add an armv7 implementation of cpu_sleep(). The arm11/armv6 implementation we've been using was actually just spinning due to ARM having redefined the old 'wait for interrupt' operation via the system coprocessor as a nop and replacing it with a WFI instruction. Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/arm/cpufunc_asm_armv7.S head/sys/arm/include/cpufunc.h Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Fri Feb 28 00:39:35 2014 (r262586) +++ head/sys/arm/arm/cpufunc.c Fri Feb 28 00:41:55 2014 (r262587) @@ -1107,7 +1107,7 @@ struct cpu_functions cortexa_cpufuncs = cpufunc_nullop, /* flush_brnchtgt_C */ (void *)cpufunc_nullop, /* flush_brnchtgt_E */ - arm11_sleep, /* sleep */ + armv7_sleep, /* sleep */ /* Soft functions */ Modified: head/sys/arm/arm/cpufunc_asm_armv7.S ============================================================================== --- head/sys/arm/arm/cpufunc_asm_armv7.S Fri Feb 28 00:39:35 2014 (r262586) +++ head/sys/arm/arm/cpufunc_asm_armv7.S Fri Feb 28 00:41:55 2014 (r262587) @@ -343,3 +343,9 @@ ENTRY(armv7_idcache_inv_all) bx lr @ return END(armv7_l1cache_inv_all) +ENTRY_NP(armv7_sleep) + dsb + wfi + bx lr +END(armv7_sleep) + Modified: head/sys/arm/include/cpufunc.h ============================================================================== --- head/sys/arm/include/cpufunc.h Fri Feb 28 00:39:35 2014 (r262586) +++ head/sys/arm/include/cpufunc.h Fri Feb 28 00:41:55 2014 (r262587) @@ -523,6 +523,7 @@ void armv7_setup (char *string); void armv7_context_switch (void); void armv7_drain_writebuf (void); void armv7_sev (void); +void armv7_sleep (int unused); u_int armv7_auxctrl (u_int, u_int); void pj4bv7_setup (char *string); void pj4b_config (void);