From owner-svn-src-all@FreeBSD.ORG Sun Apr 27 23:47:39 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id DF21FAAB; Sun, 27 Apr 2014 23:47:39 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BF6D2DE3; Sun, 27 Apr 2014 23:47:39 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s3RNldds009482; Sun, 27 Apr 2014 23:47:39 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s3RNldg0009477; Sun, 27 Apr 2014 23:47:39 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201404272347.s3RNldg0009477@svn.freebsd.org> From: Ian Lepore Date: Sun, 27 Apr 2014 23:47:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r265035 - in head/sys/arm: arm freescale/imx include ti/omap4 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 27 Apr 2014 23:47:39 -0000 Author: ian Date: Sun Apr 27 23:47:38 2014 New Revision: 265035 URL: http://svnweb.freebsd.org/changeset/base/265035 Log: Move duplicated code to print l2 cache config into the common code. Modified: head/sys/arm/arm/pl310.c head/sys/arm/freescale/imx/imx6_pl310.c head/sys/arm/include/pl310.h head/sys/arm/ti/omap4/omap4_l2cache.c Modified: head/sys/arm/arm/pl310.c ============================================================================== --- head/sys/arm/arm/pl310.c Sun Apr 27 23:37:39 2014 (r265034) +++ head/sys/arm/arm/pl310.c Sun Apr 27 23:47:38 2014 (r265035) @@ -84,6 +84,47 @@ static uint32_t g_ways_assoc; static struct pl310_softc *pl310_softc; +void +pl310_print_config(struct pl310_softc *sc) +{ + uint32_t aux, prefetch; + const char *dis = "disabled"; + const char *ena = "enabled"; + + aux = pl310_read4(sc, PL310_AUX_CTRL); + prefetch = pl310_read4(sc, PL310_PREFETCH_CTRL); + + device_printf(sc->sc_dev, "Early BRESP response: %s\n", + (aux & AUX_CTRL_EARLY_BRESP) ? ena : dis); + device_printf(sc->sc_dev, "Instruction prefetch: %s\n", + (aux & AUX_CTRL_INSTR_PREFETCH) ? ena : dis); + device_printf(sc->sc_dev, "Data prefetch: %s\n", + (aux & AUX_CTRL_DATA_PREFETCH) ? ena : dis); + device_printf(sc->sc_dev, "Non-secure interrupt control: %s\n", + (aux & AUX_CTRL_NS_INT_CTRL) ? ena : dis); + device_printf(sc->sc_dev, "Non-secure lockdown: %s\n", + (aux & AUX_CTRL_NS_LOCKDOWN) ? ena : dis); + device_printf(sc->sc_dev, "Share override: %s\n", + (aux & AUX_CTRL_SHARE_OVERRIDE) ? ena : dis); + + device_printf(sc->sc_dev, "Double linefill: %s\n", + (prefetch & PREFETCH_CTRL_DL) ? ena : dis); + device_printf(sc->sc_dev, "Instruction prefetch: %s\n", + (prefetch & PREFETCH_CTRL_INSTR_PREFETCH) ? ena : dis); + device_printf(sc->sc_dev, "Data prefetch: %s\n", + (prefetch & PREFETCH_CTRL_DATA_PREFETCH) ? ena : dis); + device_printf(sc->sc_dev, "Double linefill on WRAP request: %s\n", + (prefetch & PREFETCH_CTRL_DL_ON_WRAP) ? ena : dis); + device_printf(sc->sc_dev, "Prefetch drop: %s\n", + (prefetch & PREFETCH_CTRL_PREFETCH_DROP) ? ena : dis); + device_printf(sc->sc_dev, "Incr double Linefill: %s\n", + (prefetch & PREFETCH_CTRL_INCR_DL) ? ena : dis); + device_printf(sc->sc_dev, "Not same ID on exclusive sequence: %s\n", + (prefetch & PREFETCH_CTRL_NOTSAMEID) ? ena : dis); + device_printf(sc->sc_dev, "Prefetch offset: %d\n", + (prefetch & PREFETCH_CTRL_OFFSET_MASK)); +} + static int pl310_filter(void *arg) { @@ -351,6 +392,8 @@ pl310_attach(device_t dev) /* Enable the L2 cache if disabled */ platform_pl310_write_ctrl(sc, CTRL_ENABLED); device_printf(dev, "L2 Cache enabled\n"); + if (bootverbose) + pl310_print_config(sc); } if (!sc->sc_enabled && (ctrl_value & CTRL_ENABLED)) { Modified: head/sys/arm/freescale/imx/imx6_pl310.c ============================================================================== --- head/sys/arm/freescale/imx/imx6_pl310.c Sun Apr 27 23:37:39 2014 (r265034) +++ head/sys/arm/freescale/imx/imx6_pl310.c Sun Apr 27 23:47:38 2014 (r265035) @@ -44,42 +44,6 @@ __FBSDID("$FreeBSD$"); void platform_pl310_init(struct pl310_softc *sc) { - uint32_t aux, prefetch; - - aux = pl310_read4(sc, PL310_AUX_CTRL); - prefetch = pl310_read4(sc, PL310_PREFETCH_CTRL); - - if (bootverbose) { - device_printf(sc->sc_dev, "Early BRESP response: %s\n", - (aux & AUX_CTRL_EARLY_BRESP) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Instruction prefetch: %s\n", - (aux & AUX_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Data prefetch: %s\n", - (aux & AUX_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Non-secure interrupt control: %s\n", - (aux & AUX_CTRL_NS_INT_CTRL) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Non-secure lockdown: %s\n", - (aux & AUX_CTRL_NS_LOCKDOWN) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Share override: %s\n", - (aux & AUX_CTRL_SHARE_OVERRIDE) ? "enabled" : "disabled"); - - device_printf(sc->sc_dev, "Double linefil: %s\n", - (prefetch & PREFETCH_CTRL_DL) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Instruction prefetch: %s\n", - (prefetch & PREFETCH_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Data prefetch: %s\n", - (prefetch & PREFETCH_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Double linefill on WRAP request: %s\n", - (prefetch & PREFETCH_CTRL_DL_ON_WRAP) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Prefetch drop: %s\n", - (prefetch & PREFETCH_CTRL_PREFETCH_DROP) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Incr double Linefill: %s\n", - (prefetch & PREFETCH_CTRL_INCR_DL) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Not same ID on exclusive sequence: %s\n", - (prefetch & PREFETCH_CTRL_NOTSAMEID) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Prefetch offset: %d\n", - (prefetch & PREFETCH_CTRL_OFFSET_MASK)); - } } void Modified: head/sys/arm/include/pl310.h ============================================================================== --- head/sys/arm/include/pl310.h Sun Apr 27 23:37:39 2014 (r265034) +++ head/sys/arm/include/pl310.h Sun Apr 27 23:47:38 2014 (r265035) @@ -161,6 +161,8 @@ pl310_write4(struct pl310_softc *sc, bus bus_write_4(sc->sc_mem_res, off, val); } +void pl310_print_config(struct pl310_softc *sc); + void platform_pl310_init(struct pl310_softc *); void platform_pl310_write_ctrl(struct pl310_softc *, uint32_t); void platform_pl310_write_debug(struct pl310_softc *, uint32_t); Modified: head/sys/arm/ti/omap4/omap4_l2cache.c ============================================================================== --- head/sys/arm/ti/omap4/omap4_l2cache.c Sun Apr 27 23:37:39 2014 (r265034) +++ head/sys/arm/ti/omap4/omap4_l2cache.c Sun Apr 27 23:47:38 2014 (r265035) @@ -45,38 +45,6 @@ platform_pl310_init(struct pl310_softc * aux = pl310_read4(sc, PL310_AUX_CTRL); prefetch = pl310_read4(sc, PL310_PREFETCH_CTRL); - if (bootverbose) { - device_printf(sc->sc_dev, "Early BRESP response: %s\n", - (aux & AUX_CTRL_EARLY_BRESP) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Instruction prefetch: %s\n", - (aux & AUX_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Data prefetch: %s\n", - (aux & AUX_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Non-secure interrupt control: %s\n", - (aux & AUX_CTRL_NS_INT_CTRL) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Non-secure lockdown: %s\n", - (aux & AUX_CTRL_NS_LOCKDOWN) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Share override: %s\n", - (aux & AUX_CTRL_SHARE_OVERRIDE) ? "enabled" : "disabled"); - - device_printf(sc->sc_dev, "Double linefil: %s\n", - (prefetch & PREFETCH_CTRL_DL) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Instruction prefetch: %s\n", - (prefetch & PREFETCH_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Data prefetch: %s\n", - (prefetch & PREFETCH_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Double linefill on WRAP request: %s\n", - (prefetch & PREFETCH_CTRL_DL_ON_WRAP) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Prefetch drop: %s\n", - (prefetch & PREFETCH_CTRL_PREFETCH_DROP) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Incr double Linefill: %s\n", - (prefetch & PREFETCH_CTRL_INCR_DL) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Not same ID on exclusive sequence: %s\n", - (prefetch & PREFETCH_CTRL_NOTSAMEID) ? "enabled" : "disabled"); - device_printf(sc->sc_dev, "Prefetch offset: %d\n", - (prefetch & PREFETCH_CTRL_OFFSET_MASK)); - } - /* * Disable instruction prefetch */