From owner-p4-projects@FreeBSD.ORG Mon Apr 7 01:00:49 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 0BF0D37B404; Mon, 7 Apr 2003 01:00:49 -0700 (PDT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id A0F3837B401 for ; Mon, 7 Apr 2003 01:00:48 -0700 (PDT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 2E01D43FB1 for ; Mon, 7 Apr 2003 01:00:48 -0700 (PDT) (envelope-from peter@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.6/8.12.6) with ESMTP id h3780m0U050931 for ; Mon, 7 Apr 2003 01:00:48 -0700 (PDT) (envelope-from peter@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.6/8.12.6/Submit) id h3780lLb050926 for perforce@freebsd.org; Mon, 7 Apr 2003 01:00:47 -0700 (PDT) Date: Mon, 7 Apr 2003 01:00:47 -0700 (PDT) Message-Id: <200304070800.h3780lLb050926@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to peter@freebsd.org using -f From: Peter Wemm To: Perforce Change Reviews Subject: PERFORCE change 28417 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 07 Apr 2003 08:00:50 -0000 http://perforce.freebsd.org/chv.cgi?CH=28417 Change 28417 by peter@peter_overcee on 2003/04/07 01:00:41 argh. dont ask for 64 bit register when we mean %eax/%edx. Otherwise we get what we ask for.. The *msr instructions are 32 bit.. (!) Affected files ... .. //depot/projects/hammer/sys/x86_64/include/cpufunc.h#9 edit Differences ... ==== //depot/projects/hammer/sys/x86_64/include/cpufunc.h#9 (text+ko) ==== @@ -315,37 +315,37 @@ static __inline u_long read_rflags(void) { - u_long ef; + u_long rf; - __asm __volatile("pushfq; popq %0" : "=r" (ef)); - return (ef); + __asm __volatile("pushfq; popq %0" : "=r" (rf)); + return (rf); } static __inline u_int64_t rdmsr(u_int msr) { - u_int64_t rv; + u_int32_t low, high; - __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr)); - return (rv); + __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); + return (low | ((u_int64_t)high << 32)); } static __inline u_int64_t rdpmc(u_int pmc) { - u_int64_t rv; + u_int32_t low, high; - __asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc)); - return (rv); + __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc)); + return (low | ((u_int64_t)high << 32)); } static __inline u_int64_t rdtsc(void) { - u_int64_t rv; + u_int32_t low, high; - __asm __volatile("rdtsc" : "=A" (rv)); - return (rv); + __asm __volatile("rdtsc" : "=a" (low), "=d" (high)); + return (low | ((u_int64_t)high << 32)); } static __inline void @@ -355,15 +355,19 @@ } static __inline void -write_rflags(u_long ef) +write_rflags(u_long rf) { - __asm __volatile("pushq %0; popfq" : : "r" (ef)); + __asm __volatile("pushq %0; popfq" : : "r" (rf)); } static __inline void wrmsr(u_int msr, u_int64_t newval) { - __asm __volatile("wrmsr" : : "A" (newval), "c" (msr)); + u_int32_t low, high; + + low = newval; + high = newval >> 32; + __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); } static __inline void @@ -557,11 +561,11 @@ u_int64_t rdtsc(void); u_int read_rflags(void); void wbinvd(void); -void write_rflags(u_int ef); +void write_rflags(u_int rf); void wrmsr(u_int msr, u_int64_t newval); void load_dr7(u_int dr7); register_t intr_disable(void); -void intr_restore(register_t ef); +void intr_restore(register_t rf); #endif /* __GNUC__ */