From owner-svn-src-all@FreeBSD.ORG Wed May 14 04:42:40 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 8316D7E7; Wed, 14 May 2014 04:42:40 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 6523E26CE; Wed, 14 May 2014 04:42:40 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s4E4geUZ006261; Wed, 14 May 2014 04:42:40 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s4E4gc8G006249; Wed, 14 May 2014 04:42:38 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201405140442.s4E4gc8G006249@svn.freebsd.org> From: Ian Lepore Date: Wed, 14 May 2014 04:42:38 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r266004 - in stable/10/sys: conf powerpc/booke powerpc/fpu powerpc/include powerpc/powerpc X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 May 2014 04:42:40 -0000 Author: ian Date: Wed May 14 04:42:38 2014 New Revision: 266004 URL: http://svnweb.freebsd.org/changeset/base/266004 Log: MFC r258247, r258250, r258257 Remove a pointless #ifdef AIM. This is just PPC64 specific, including 64-bit Book-E. Make single precision floating point arithmetic actually work Split the function of the PCB_FPU flags into two: PCB_FPU now indicates that the actual FPU is enabled, while PCB_FPREGS indicates that the FPU state structure in the PCB is valid. Modified: stable/10/sys/conf/files.powerpc stable/10/sys/powerpc/booke/trap.c stable/10/sys/powerpc/fpu/fpu_emu.c stable/10/sys/powerpc/fpu/fpu_explode.c stable/10/sys/powerpc/include/counter.h stable/10/sys/powerpc/include/pcb.h stable/10/sys/powerpc/powerpc/exec_machdep.c stable/10/sys/powerpc/powerpc/fpu.c stable/10/sys/powerpc/powerpc/swtch32.S Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/conf/files.powerpc ============================================================================== --- stable/10/sys/conf/files.powerpc Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/conf/files.powerpc Wed May 14 04:42:38 2014 (r266004) @@ -169,7 +169,7 @@ powerpc/powermac/uninorth.c optional pow powerpc/powermac/uninorthpci.c optional powermac pci powerpc/powermac/vcoregpio.c optional powermac powerpc/powermac/windtunnel.c optional powermac windtunnel -powerpc/powerpc/altivec.c optional aim +powerpc/powerpc/altivec.c standard powerpc/powerpc/autoconf.c standard powerpc/powerpc/bcopy.c standard powerpc/powerpc/bus_machdep.c standard @@ -186,7 +186,7 @@ powerpc/powerpc/dump_machdep.c standard powerpc/powerpc/elf32_machdep.c optional powerpc | compat_freebsd32 powerpc/powerpc/elf64_machdep.c optional powerpc64 powerpc/powerpc/exec_machdep.c standard -powerpc/powerpc/fpu.c optional aim +powerpc/powerpc/fpu.c standard powerpc/powerpc/fuswintr.c standard powerpc/powerpc/gdb_machdep.c optional gdb powerpc/powerpc/in_cksum.c optional inet | inet6 Modified: stable/10/sys/powerpc/booke/trap.c ============================================================================== --- stable/10/sys/powerpc/booke/trap.c Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/booke/trap.c Wed May 14 04:42:38 2014 (r266004) @@ -194,6 +194,11 @@ trap(struct trapframe *frame) case EXC_PGM: /* Program exception */ #ifdef FPU_EMU + if (!(td->td_pcb->pcb_flags & PCB_FPREGS)) { + bzero(&td->td_pcb->pcb_fpu, + sizeof(td->td_pcb->pcb_fpu)); + td->td_pcb->pcb_flags |= PCB_FPREGS; + } sig = fpu_emulate(frame, (struct fpreg *)&td->td_pcb->pcb_fpu); #else Modified: stable/10/sys/powerpc/fpu/fpu_emu.c ============================================================================== --- stable/10/sys/powerpc/fpu/fpu_emu.c Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/fpu/fpu_emu.c Wed May 14 04:42:38 2014 (r266004) @@ -606,9 +606,11 @@ fpu_execute(struct trapframe *tf, struct rb = instr.i_a.i_frb; rc = instr.i_a.i_frc; - type = FTYPE_SNG; - if (instr.i_any.i_opcd & 0x4) - type = FTYPE_DBL; + /* + * All arithmetic operations work on registers, which + * are stored as doubles. + */ + type = FTYPE_DBL; switch ((unsigned int)instr.i_a.i_xo) { case OPC59_FDIVS: FPU_EMU_EVCNT_INCR(fdiv); @@ -725,6 +727,13 @@ fpu_execute(struct trapframe *tf, struct return (NOTFPU); break; } + + /* If the instruction was single precision, round */ + if (!(instr.i_any.i_opcd & 0x4)) { + fpu_implode(fe, fp, FTYPE_SNG, + (u_int *)&fs->fpreg[rt]); + fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt); + } } } else { return (NOTFPU); Modified: stable/10/sys/powerpc/fpu/fpu_explode.c ============================================================================== --- stable/10/sys/powerpc/fpu/fpu_explode.c Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/fpu/fpu_explode.c Wed May 14 04:42:38 2014 (r266004) @@ -235,6 +235,7 @@ fpu_explode(struct fpemu *fe, struct fpn s = fpu_dtof(fp, s, space[1]); break; + default: panic("fpu_explode"); panic("fpu_explode: invalid type %d", type); } Modified: stable/10/sys/powerpc/include/counter.h ============================================================================== --- stable/10/sys/powerpc/include/counter.h Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/include/counter.h Wed May 14 04:42:38 2014 (r266004) @@ -34,7 +34,7 @@ #include #endif -#if defined(AIM) && defined(__powerpc64__) +#ifdef __powerpc64__ #define counter_enter() do {} while (0) #define counter_exit() do {} while (0) @@ -98,7 +98,7 @@ counter_u64_add(counter_u64_t c, int64_t : "cc", "memory"); } -#else /* !AIM || !64bit */ +#else /* !64bit */ #define counter_enter() critical_enter() #define counter_exit() critical_exit() @@ -157,6 +157,6 @@ counter_u64_add(counter_u64_t c, int64_t counter_exit(); } -#endif /* AIM 64bit */ +#endif /* 64bit */ #endif /* ! __MACHINE_COUNTER_H__ */ Modified: stable/10/sys/powerpc/include/pcb.h ============================================================================== --- stable/10/sys/powerpc/include/pcb.h Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/include/pcb.h Wed May 14 04:42:38 2014 (r266004) @@ -47,8 +47,9 @@ struct pcb { faultbuf *pcb_onfault; /* For use during copyin/copyout */ int pcb_flags; -#define PCB_FPU 1 /* Process had FPU initialized */ -#define PCB_VEC 2 /* Process had Altivec initialized */ +#define PCB_FPU 1 /* Process uses FPU */ +#define PCB_FPREGS 2 /* Process had FPU registers initialized */ +#define PCB_VEC 4 /* Process had Altivec initialized */ struct fpu { double fpr[32]; double fpscr; /* FPSCR stored as double for easier access */ Modified: stable/10/sys/powerpc/powerpc/exec_machdep.c ============================================================================== --- stable/10/sys/powerpc/powerpc/exec_machdep.c Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/powerpc/exec_machdep.c Wed May 14 04:42:38 2014 (r266004) @@ -381,19 +381,20 @@ grab_mcontext(struct thread *td, mcontex mcp->mc_gpr[4] = 0; } -#ifdef AIM /* * This assumes that floating-point context is *not* lazy, * so if the thread has used FP there would have been a * FP-unavailable exception that would have set things up * correctly. */ - if (pcb->pcb_flags & PCB_FPU) { - KASSERT(td == curthread, - ("get_mcontext: fp save not curthread")); - critical_enter(); - save_fpu(td); - critical_exit(); + if (pcb->pcb_flags & PCB_FPREGS) { + if (pcb->pcb_flags & PCB_FPU) { + KASSERT(td == curthread, + ("get_mcontext: fp save not curthread")); + critical_enter(); + save_fpu(td); + critical_exit(); + } mcp->mc_flags |= _MC_FP_VALID; memcpy(&mcp->mc_fpscr, &pcb->pcb_fpu.fpscr, sizeof(double)); memcpy(mcp->mc_fpreg, pcb->pcb_fpu.fpr, 32*sizeof(double)); @@ -414,7 +415,6 @@ grab_mcontext(struct thread *td, mcontex mcp->mc_vrsave = pcb->pcb_vec.vrsave; memcpy(mcp->mc_avec, pcb->pcb_vec.vr, sizeof(mcp->mc_avec)); } -#endif mcp->mc_len = sizeof(*mcp); @@ -467,13 +467,9 @@ set_mcontext(struct thread *td, const mc else tf->fixreg[2] = tls; -#ifdef AIM if (mcp->mc_flags & _MC_FP_VALID) { - if ((pcb->pcb_flags & PCB_FPU) != PCB_FPU) { - critical_enter(); - enable_fpu(td); - critical_exit(); - } + /* enable_fpu() will happen lazily on a fault */ + pcb->pcb_flags |= PCB_FPREGS; memcpy(&pcb->pcb_fpu.fpscr, &mcp->mc_fpscr, sizeof(double)); memcpy(pcb->pcb_fpu.fpr, mcp->mc_fpreg, 32*sizeof(double)); } @@ -488,7 +484,6 @@ set_mcontext(struct thread *td, const mc pcb->pcb_vec.vrsave = mcp->mc_vrsave; memcpy(pcb->pcb_vec.vr, mcp->mc_avec, sizeof(mcp->mc_avec)); } -#endif return (0); } @@ -625,7 +620,7 @@ fill_fpregs(struct thread *td, struct fp pcb = td->td_pcb; - if ((pcb->pcb_flags & PCB_FPU) == 0) + if ((pcb->pcb_flags & PCB_FPREGS) == 0) memset(fpregs, 0, sizeof(struct fpreg)); else memcpy(fpregs, &pcb->pcb_fpu, sizeof(struct fpreg)); @@ -654,14 +649,11 @@ set_dbregs(struct thread *td, struct dbr int set_fpregs(struct thread *td, struct fpreg *fpregs) { -#ifdef AIM struct pcb *pcb; pcb = td->td_pcb; - if ((pcb->pcb_flags & PCB_FPU) == 0) - enable_fpu(td); + pcb->pcb_flags |= PCB_FPREGS; memcpy(&pcb->pcb_fpu, fpregs, sizeof(struct fpreg)); -#endif return (0); } @@ -1021,14 +1013,10 @@ cpu_set_upcall_kse(struct thread *td, vo tf->fixreg[3] = (register_t)arg; if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { tf->srr0 = (register_t)entry; - #ifdef AIM tf->srr1 = PSL_USERSET | PSL_FE_DFLT; #ifdef __powerpc64__ tf->srr1 &= ~PSL_SF; #endif - #else - tf->srr1 = PSL_USERSET; - #endif } else { #ifdef __powerpc64__ register_t entry_desc[3]; Modified: stable/10/sys/powerpc/powerpc/fpu.c ============================================================================== --- stable/10/sys/powerpc/powerpc/fpu.c Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/powerpc/fpu.c Wed May 14 04:42:38 2014 (r266004) @@ -66,10 +66,11 @@ enable_fpu(struct thread *td) * initialise the FPU registers and FPSCR to 0, and set the flag * to indicate that the FPU is in use. */ + pcb->pcb_flags |= PCB_FPU; tf->srr1 |= PSL_FP; - if (!(pcb->pcb_flags & PCB_FPU)) { + if (!(pcb->pcb_flags & PCB_FPREGS)) { memset(&pcb->pcb_fpu, 0, sizeof pcb->pcb_fpu); - pcb->pcb_flags |= PCB_FPU; + pcb->pcb_flags |= PCB_FPREGS; } /* Modified: stable/10/sys/powerpc/powerpc/swtch32.S ============================================================================== --- stable/10/sys/powerpc/powerpc/swtch32.S Wed May 14 04:14:58 2014 (r266003) +++ stable/10/sys/powerpc/powerpc/swtch32.S Wed May 14 04:42:38 2014 (r266004) @@ -100,7 +100,6 @@ ENTRY(cpu_switch) mr %r16,%r5 /* and the new lock */ mr %r17,%r6 /* and the PCB */ -#ifdef AIM lwz %r7,PCB_FLAGS(%r17) /* Save FPU context if needed */ andi. %r7, %r7, PCB_FPU @@ -116,7 +115,6 @@ ENTRY(cpu_switch) bl save_vec .L2: -#endif mr %r3,%r14 /* restore old thread ptr */ bl pmap_deactivate /* Deactivate the current pmap */ @@ -143,7 +141,6 @@ blocked_loop: mr %r3,%r2 /* Get new thread ptr */ bl pmap_activate /* Activate the new address space */ -#ifdef AIM lwz %r6, PCB_FLAGS(%r17) /* Restore FPU context if needed */ andi. %r6, %r6, PCB_FPU @@ -160,7 +157,6 @@ blocked_loop: bl enable_vec .L4: -#endif /* thread to restore is in r3 */ mr %r3,%r17 /* Recover PCB ptr */ lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */