From owner-svn-src-all@FreeBSD.ORG Wed May 14 22:24:11 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 3842BC62; Wed, 14 May 2014 22:24:11 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 23A7E2121; Wed, 14 May 2014 22:24:11 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s4EMOAUY091342; Wed, 14 May 2014 22:24:10 GMT (envelope-from neel@svn.freebsd.org) Received: (from neel@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s4EMOAOI091338; Wed, 14 May 2014 22:24:10 GMT (envelope-from neel@svn.freebsd.org) Message-Id: <201405142224.s4EMOAOI091338@svn.freebsd.org> From: Neel Natu Date: Wed, 14 May 2014 22:24:10 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r266093 - in head/sys/amd64: amd64 include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 May 2014 22:24:11 -0000 Author: neel Date: Wed May 14 22:24:09 2014 New Revision: 266093 URL: http://svnweb.freebsd.org/changeset/base/266093 Log: Increase the TSS limit by one byte. The processor requires an additional byte with all bits set to 1 beyond the I/O permission bitmap. Prior to this change accessing I/O ports [0xFFF8-0xFFFF] would trigger a #GP fault even though the I/O bitmap allowed access to those ports. For more details see section "I/O Permission Bit Map" in the Intel SDM, Vol 1. Reviewed by: kib Modified: head/sys/amd64/amd64/machdep.c head/sys/amd64/amd64/mp_machdep.c head/sys/amd64/amd64/sys_machdep.c head/sys/amd64/include/param.h Modified: head/sys/amd64/amd64/machdep.c ============================================================================== --- head/sys/amd64/amd64/machdep.c Wed May 14 21:54:14 2014 (r266092) +++ head/sys/amd64/amd64/machdep.c Wed May 14 22:24:09 2014 (r266093) @@ -1147,7 +1147,7 @@ struct soft_segment_descriptor gdt_segs[ .ssd_gran = 1 }, /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ { .ssd_base = 0x0, - .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1, + .ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1, .ssd_type = SDT_SYSTSS, .ssd_dpl = SEL_KPL, .ssd_p = 1, @@ -2003,8 +2003,7 @@ hammer_time(u_int64_t modulep, u_int64_t common_tss[0].tss_ist2 = (long) np; /* Set the IO permission bitmap (empty due to tss seg limit) */ - common_tss[0].tss_iobase = sizeof(struct amd64tss) + - IOPAGES * PAGE_SIZE; + common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE; gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); ltr(gsel_tss); Modified: head/sys/amd64/amd64/mp_machdep.c ============================================================================== --- head/sys/amd64/amd64/mp_machdep.c Wed May 14 21:54:14 2014 (r266092) +++ head/sys/amd64/amd64/mp_machdep.c Wed May 14 22:24:09 2014 (r266093) @@ -637,7 +637,7 @@ init_secondary(void) common_tss[cpu] = common_tss[0]; common_tss[cpu].tss_rsp0 = 0; /* not used until after switch */ common_tss[cpu].tss_iobase = sizeof(struct amd64tss) + - IOPAGES * PAGE_SIZE; + IOPERM_BITMAP_SIZE; common_tss[cpu].tss_ist1 = (long)&doublefault_stack[PAGE_SIZE]; /* The NMI stack runs on IST2. */ Modified: head/sys/amd64/amd64/sys_machdep.c ============================================================================== --- head/sys/amd64/amd64/sys_machdep.c Wed May 14 21:54:14 2014 (r266092) +++ head/sys/amd64/amd64/sys_machdep.c Wed May 14 22:24:09 2014 (r266093) @@ -338,7 +338,6 @@ amd64_set_ioperm(td, uap) char *iomap; struct amd64tss *tssp; struct system_segment_descriptor *tss_sd; - u_long *addr; struct pcb *pcb; if ((error = priv_check(td, PRIV_IO)) != 0) @@ -361,9 +360,7 @@ amd64_set_ioperm(td, uap) if (tssp == NULL) return (ENOMEM); iomap = (char *)&tssp[1]; - addr = (u_long *)iomap; - for (i = 0; i < (ctob(IOPAGES) + 1) / sizeof(u_long); i++) - *addr++ = ~0; + memset(iomap, 0xff, IOPERM_BITMAP_SIZE); critical_enter(); /* Takes care of tss_rsp0. */ memcpy(tssp, &common_tss[PCPU_GET(cpuid)], Modified: head/sys/amd64/include/param.h ============================================================================== --- head/sys/amd64/include/param.h Wed May 14 21:54:14 2014 (r266092) +++ head/sys/amd64/include/param.h Wed May 14 22:24:09 2014 (r266093) @@ -120,6 +120,12 @@ #define MAXPAGESIZES 3 /* maximum number of supported page sizes */ #define IOPAGES 2 /* pages of i/o permission bitmap */ +/* + * I/O permission bitmap has a bit for each I/O port plus an additional + * byte at the end with all bits set. See section "I/O Permission Bit Map" + * in the Intel SDM for more details. + */ +#define IOPERM_BITMAP_SIZE (IOPAGES * PAGE_SIZE + 1) #ifndef KSTACK_PAGES #define KSTACK_PAGES 4 /* pages of kstack (with pcb) */