From owner-svn-src-head@FreeBSD.ORG Wed Dec 29 14:11:47 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5183310656A6; Wed, 29 Dec 2010 14:11:47 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 251518FC17; Wed, 29 Dec 2010 14:11:47 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id oBTEBls7003220; Wed, 29 Dec 2010 14:11:47 GMT (envelope-from marius@svn.freebsd.org) Received: (from marius@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id oBTEBlKc003218; Wed, 29 Dec 2010 14:11:47 GMT (envelope-from marius@svn.freebsd.org) Message-Id: <201012291411.oBTEBlKc003218@svn.freebsd.org> From: Marius Strobl Date: Wed, 29 Dec 2010 14:11:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r216801 - head/sys/sparc64/include X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Dec 2010 14:11:47 -0000 Author: marius Date: Wed Dec 29 14:11:46 2010 New Revision: 216801 URL: http://svn.freebsd.org/changeset/base/216801 Log: Rename the "xor" parameter to "xorval" as the former is a reserved keyword in C++. Submitted by: gahr Modified: head/sys/sparc64/include/cpufunc.h Modified: head/sys/sparc64/include/cpufunc.h ============================================================================== --- head/sys/sparc64/include/cpufunc.h Wed Dec 29 14:06:20 2010 (r216800) +++ head/sys/sparc64/include/cpufunc.h Wed Dec 29 14:11:46 2010 (r216801) @@ -157,9 +157,9 @@ int fasword32(u_long asi, void *addr, ui __sr; \ }) -#define wr(name, val, xor) do { \ +#define wr(name, val, xorval) do { \ __asm __volatile("wr %0, %1, %%" #name \ - : : "r" (val), "rI" (xor)); \ + : : "r" (val), "rI" (xorval)); \ } while (0) #define rdpr(name) ({ \ @@ -168,24 +168,24 @@ int fasword32(u_long asi, void *addr, ui __pr; \ }) -#define wrpr(name, val, xor) do { \ +#define wrpr(name, val, xorval) do { \ __asm __volatile("wrpr %0, %1, %%" #name \ - : : "r" (val), "rI" (xor)); \ + : : "r" (val), "rI" (xorval)); \ } while (0) /* * Trick GAS/GCC into compiling access to TICK/(S)TICK_COMPARE independently * of the selected instruction set. */ -#define rdtickcmpr() rd(asr23) -#define rdstick() rd(asr24) -#define rdstickcmpr() rd(asr25) -#define wrtickcmpr(val, xor) wr(asr23, (val), (xor)) -#define wrstick(val, xor) wr(asr24, (val), (xor)) -#define wrstickcmpr(val, xor) wr(asr25, (val), (xor)) +#define rdtickcmpr() rd(asr23) +#define rdstick() rd(asr24) +#define rdstickcmpr() rd(asr25) +#define wrtickcmpr(val, xorval) wr(asr23, (val), (xorval)) +#define wrstick(val, xorval) wr(asr24, (val), (xorval)) +#define wrstickcmpr(val, xorval) wr(asr25, (val), (xorval)) /* - * Macro intended to be used instead of wr(asr23, val, xor) for writing to + * Macro intended to be used instead of wr(asr23, val, xorval) for writing to * the TICK_COMPARE register in order to avoid a bug in BlackBird CPUs that * can cause these writes to fail under certain condidtions which in turn * causes the hardclock to stop. The workaround is to read the TICK_COMPARE @@ -193,14 +193,14 @@ int fasword32(u_long asi, void *addr, ui * aligned to a quadword boundary in order to ensure that I$ misses won't * split them up. */ -#define wrtickcmpr_bbwar(val, xor) ({ \ +#define wrtickcmpr_bbwar(val, xorval) ({ \ __asm __volatile( \ " ba,pt %%xcc, 1f ; " \ " nop ; " \ " .align 128 ; " \ "1: wr %0, %1, %%asr23 ; " \ " rd %%asr23, %%g0 ; " \ - : : "r" (val), "rI" (xor)); \ + : : "r" (val), "rI" (xorval)); \ }) static __inline void