From owner-svn-src-all@FreeBSD.ORG Sat May 17 20:22:24 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 9D6E0D67; Sat, 17 May 2014 20:22:24 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 894C92433; Sat, 17 May 2014 20:22:24 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s4HKMOH0070900; Sat, 17 May 2014 20:22:24 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s4HKMNgh070891; Sat, 17 May 2014 20:22:23 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201405172022.s4HKMNgh070891@svn.freebsd.org> From: Ian Lepore Date: Sat, 17 May 2014 20:22:23 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r266348 - in stable/10/sys: arm/freescale/imx boot/fdt/dts/arm conf X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 17 May 2014 20:22:24 -0000 Author: ian Date: Sat May 17 20:22:22 2014 New Revision: 266348 URL: http://svnweb.freebsd.org/changeset/base/266348 Log: MFC 264054, 264056 Switch imx6 to using the mpcore per-cpu event timers, but continue to use the GPT timer, which is fixed-frequency, as a timecounter. Change NO_EVENTTIMERS from an arm-specific to an MI option, so that it can be used in MI code. Modified: stable/10/sys/arm/freescale/imx/files.imx6 stable/10/sys/arm/freescale/imx/imx6_anatop.c stable/10/sys/arm/freescale/imx/imx6_machdep.c stable/10/sys/boot/fdt/dts/arm/imx6.dtsi stable/10/sys/conf/options stable/10/sys/conf/options.arm Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/freescale/imx/files.imx6 ============================================================================== --- stable/10/sys/arm/freescale/imx/files.imx6 Sat May 17 20:10:12 2014 (r266347) +++ stable/10/sys/arm/freescale/imx/files.imx6 Sat May 17 20:22:22 2014 (r266348) @@ -16,6 +16,7 @@ kern/kern_clocksource.c standard arm/arm/gic.c standard arm/arm/pl310.c standard arm/freescale/imx/bus_space.c standard +arm/arm/mpcore_timer.c standard arm/freescale/fsl_ocotp.c standard arm/freescale/imx/imx6_anatop.c standard arm/freescale/imx/imx_common.c standard Modified: stable/10/sys/arm/freescale/imx/imx6_anatop.c ============================================================================== --- stable/10/sys/arm/freescale/imx/imx6_anatop.c Sat May 17 20:10:12 2014 (r266347) +++ stable/10/sys/arm/freescale/imx/imx6_anatop.c Sat May 17 20:22:22 2014 (r266348) @@ -68,6 +68,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -263,6 +264,8 @@ cpufreq_set_clock(struct imx6_anatop_sof imx6_anatop_write_4(IMX6_ANALOG_CCM_PLL_ARM_CLR, IMX6_ANALOG_CCM_PLL_ARM_BYPASS); + + arm_tmr_change_frequency(sc->cpu_curhz / 2); } static void Modified: stable/10/sys/arm/freescale/imx/imx6_machdep.c ============================================================================== --- stable/10/sys/arm/freescale/imx/imx6_machdep.c Sat May 17 20:10:12 2014 (r266347) +++ stable/10/sys/arm/freescale/imx/imx6_machdep.c Sat May 17 20:22:22 2014 (r266348) @@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -55,6 +56,8 @@ void initarm_early_init(void) { + /* Inform the MPCore timer driver that its clock is variable. */ + arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); } void Modified: stable/10/sys/boot/fdt/dts/arm/imx6.dtsi ============================================================================== --- stable/10/sys/boot/fdt/dts/arm/imx6.dtsi Sat May 17 20:10:12 2014 (r266347) +++ stable/10/sys/boot/fdt/dts/arm/imx6.dtsi Sat May 17 20:22:22 2014 (r266348) @@ -71,6 +71,14 @@ 0x00a00100 0x00000100>; }; + mp_tmr0@00a00200 { + compatible = "arm,mpcore-timers"; + reg = <0x00a00200 0x100 + 0x00a00600 0x100>; + interrupts = <27 29>; + interrupt-parent = <&gic>; + }; + l2-cache@00a02000 { compatible = "arm,pl310-cache", "arm,pl310"; reg = <0xa02000 0x1000>; Modified: stable/10/sys/conf/options ============================================================================== --- stable/10/sys/conf/options Sat May 17 20:10:12 2014 (r266347) +++ stable/10/sys/conf/options Sat May 17 20:22:22 2014 (r266348) @@ -158,6 +158,7 @@ NEW_PCIB opt_global.h NO_ADAPTIVE_MUTEXES opt_adaptive_mutexes.h NO_ADAPTIVE_RWLOCKS NO_ADAPTIVE_SX +NO_EVENTTIMERS opt_timer.h NO_SYSCTL_DESCR opt_global.h NSWBUF_MIN opt_swap.h MBUF_PACKET_ZONE_DISABLE opt_global.h Modified: stable/10/sys/conf/options.arm ============================================================================== --- stable/10/sys/conf/options.arm Sat May 17 20:10:12 2014 (r266347) +++ stable/10/sys/conf/options.arm Sat May 17 20:22:22 2014 (r266348) @@ -31,7 +31,6 @@ KERNPHYSADDR opt_global.h KERNVIRTADDR opt_global.h LINUX_BOOT_ABI opt_global.h LOADERRAMADDR opt_global.h -NO_EVENTTIMERS opt_timer.h PHYSADDR opt_global.h SOCDEV_PA opt_global.h SOCDEV_VA opt_global.h